Issued Patents All Time
Showing 25 most recent of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10297607 | Non-volatile memory having discrete isolation structure and SONOS memory cell, method of operating the same, and method of manufacturing the same | Takao Akaogi, Yi-Hsiu Chen | 2019-05-21 |
| 8802537 | System and method for improving reliability in a semiconductor device | Unsoon Kim, Kuo-Tung Chang, Harpreet Sachar | 2014-08-12 |
| 8759894 | System and method for reducing cross-coupling noise between charge storage elements in a semiconductor device | Hiroyuki Ogawa, Unsoon Kim, Angela T. Hui | 2014-06-24 |
| 8647969 | Method for forming a semiconductor layer with improved gap filling properties | Rinji Sugino, Minh Van Ngo, Jeffrey S. Glick, Kuo-Tung Chang | 2014-02-11 |
| 8598645 | System and method for improving mesa width in a semiconductor device | Unsoon Kim, Angela T. Hui, Kuo-Tung Chang, Hiroyuki Kinoshita | 2013-12-03 |
| 8476156 | Manufacturing method of flash memory structure with stress area | Hung-Wei Chen | 2013-07-02 |
| 8325518 | Multi-level cell NOR flash memory device | Sheng-Da Liu | 2012-12-04 |
| 8158519 | Method of manufacturing non-volatile memory cell using self-aligned metal silicide | Yi-Hsiu Chen, Yung-Chung Lee | 2012-04-17 |
| 8133801 | Method for forming a semiconducting layer with improved gap filling properties | Rinji Sugino, Minh Van Ngo, Jeffrey S. Glick, Kuo-Tung Chang | 2012-03-13 |
| 8093646 | Flash memory device and method of forming the same with improved gate breakdown and endurance | Angela T. Hui | 2012-01-10 |
| 8017488 | Manufacturing method of a NOR flash memory with phosphorous and arsenic ion implantations | Sheng-Da Liu | 2011-09-13 |
| 8012825 | Method of manufacturing the double-implant nor flash memory structure | Yung-Chung Lee, Yi-Hsiu Chen | 2011-09-06 |
| 8008692 | Semiconductor memory structure with stress regions | Hung-Wei Chen | 2011-08-30 |
| 7939423 | Method for manufacturing nonvolatile semiconductor memory device structure | — | 2011-05-10 |
| 7842618 | System and method for improving mesa width in a semiconductor device | Unsoon Kim, Angela T. Hui, Kuo-Tung Chang, Hiroyuki Kinoshita | 2010-11-30 |
| 7632749 | Semiconductor device having a pad metal layer and a lower metal layer that are electrically coupled, whereas apertures are formed in the lower metal layer below a center area of the pad metal layer | Hiroyuki Ogawa, Nian Yang, Kuo-Tung Chang, Yu Sun | 2009-12-15 |
| 7529132 | Single-poly non-volatile memory | Chao-Yang Chen, Hsiao-Hua Lu | 2009-05-05 |
| 7408220 | Non-volatile memory and fabricating method thereof | Jongoh Kim, Kent Kuohua Chang | 2008-08-05 |
| 7344938 | Method of fabricating memory | Kent Kuohua Chang, Jongoh Kim | 2008-03-18 |
| 7265014 | Avoiding field oxide gouging in shallow trench isolation (STI) regions | Angela T. Hui, Jusuke Ogura | 2007-09-04 |
| 7229876 | Method of fabricating memory | Kent Kuohua Chang, Jongoh Kim | 2007-06-12 |
| 7157333 | Non-volatile memory and fabricating method thereof | Jongoh Kim, Kent Kuohua Chang | 2007-01-02 |
| 7151027 | Method and device for reducing interface area of a memory device | Hiroyuki Ogawa, Kuo-Tung Chang, Yu Sun | 2006-12-19 |
| 7078749 | Memory structure having tunable interlayer dielectric and method for fabricating same | Jean Y. Yang | 2006-07-18 |
| 7067388 | Flash memory device and method of forming the same with improved gate breakdown and endurance | Angela T. Hui | 2006-06-27 |