MN

Minh Van Ngo

AM AMD: 11 patents #1,098 of 9,279Top 15%
SL Spansion Llc.: 1 patents #435 of 769Top 60%
Overall (All Time): #385,132 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8415256 Gap-filling with uniform properties Alexander H. Nickel, Lu You, Hirokazu Tokuno, Minh Quoc Tran, Hieu Pham +2 more 2013-04-09
8133801 Method for forming a semiconducting layer with improved gap filling properties Rinji Sugino, Yider Wu, Jeffrey S. Glick, Kuo-Tung Chang 2012-03-13
7071086 Method of forming a metal gate structure with tuning of work function by silicon incorporation Christy Mei-Chu Woo, Paul R. Besser, James Pan, Jinsong Yin 2006-07-04
6989601 Copper damascene with low-k capping layer and improved electromigration reliability Jeremy I. Martin, Hartmut Ruelke 2006-01-24
6764951 Method for forming nitride capped Cu lines with reduced hillock formation 2004-07-20
6492258 METHOD FOR REDUCING STRESS-INDUCED VOIDS FOR 0.25-&mgr;M AND SMALLER SEMICONDUCTOR CHIP TECHNOLOGY BY ANNEALING INTERCONNECT LINES AND USING LOW BIAS VOLTAGE AND LOW INTERLAYER DIELECTRIC DEPOSITION RATE AND SEMICONDUCTOR CHIP MADE THEREBY Paul R. Besser, Matthew S. Buynoski, John Caffall, Nick Maccrae, Richard J. Huang +1 more 2002-12-10
6472336 Forming an encapsulating layer after deposition of a dielectric comprised of corrosive material Suzette K. Pangrle, Richard J. Huang 2002-10-29
6429141 Method of manufacturing a semiconductor device with improved line width accuracy Bhanwar Singh, Dawn Hopper, Carmen Morales 2002-08-06
6406996 Sub-cap and method of manufacture therefor in integrated circuit capping layers Joffre F. Bernard, Tim Z. Hossain 2002-06-18
6329718 Method for reducing stress-induced voids for 0.25m.mu. and smaller semiconductor chip technology by annealing interconnect lines and using low bias voltage and low interlayer dielectric deposition rate and semiconductor chip made thereby Paul R. Besser, Matthew S. Buynoski, John Caffall, Nick Maccrae, Richard J. Huang +1 more 2001-12-11
6297148 Method of forming a silicon bottom anti-reflective coating with reduced junction leakage during salicidation Paul R. Besser, Yowjuang Bill Liu 2001-10-02
6153523 Method of forming high density capping layers for copper interconnects with improved adhesion Robin Cheung 2000-11-28
5963841 Gate pattern formation using a bottom anti-reflective coating Olov Karlsson, Christopher F. Lyons, Scott A. Bell, David K. Foote 1999-10-05