EL

Emmanuil H. Lingunis

AM AMD: 8 patents #1,491 of 9,279Top 20%
SL Spansion Llc.: 2 patents #309 of 769Top 45%
FA Fasl: 1 patents #23 of 52Top 45%
Fujitsu Limited: 1 patents #14,843 of 24,456Top 65%
Overall (All Time): #468,843 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDate
7507661 Method of forming narrowly spaced flash memory contact openings and lithography masks Ning Cheng, Mark T. Ramsbey, Kouros Ghandehari, Anna M. Minvielle, Hung-Eil Kim 2009-03-24
7208382 Semiconductor device with high conductivity region using shallow trench Jeffrey P. Erhardt, Kashmir Sahota, Nga-Ching Wong 2007-04-24
7098546 Alignment marks with salicided spacers between bitlines for alignment signal improvement Jean Y. Yang, Hidehiko Shiraiwa 2006-08-29
7091088 UV-blocking etch stop layer for reducing UV-induced charging of charge storage layer in memory devices in BEOL processing Ning Cheng, Clarence B. Ferguson, Minh Van Ngo, Joerg Reiss, Jean Y. Yang +2 more 2006-08-15
6963108 Recessed channel Inkuk Kang, Hiroyuki Kinoshita, Jeff P. Erhardt 2005-11-08
6958272 Pocket implant for complementary bit disturb improvement and charging improvement of SONOS memory cell Nga-Ching Wong, Sameer Haddad, Mark Randolph, Mark T. Ramsbey, Ashot Melik-Martirosian +2 more 2005-10-25
6933219 Tightly spaced gate formation through damascene process Krishnashree Achuthan, Minh Van Ngo, Cyrus E. Tabery, Jean Y. Yang 2005-08-23
6927145 Bitline hard mask spacer flow for memory cell scaling Jean Y. Yang, Mark T. Ramsbey, Jaeyong Park, Tazrien Kamal 2005-08-09
6855608 Method of fabricating a planar structure charge trapping memory cell array with rectangular gates and reduced bit line resistance Mark T. Ramsbey, Mark Randolph, Jean Y. Yang, Hiroyuki Kinoshita, Cyrus E. Tabery +3 more 2005-02-15
6720133 Memory manufacturing process using disposable ARC for wordline formation Mark T. Ramsbey, Kouros Ghandehari, Tazrien Kamal, Jean Y. Yang, Hidehiko Shiraiwa 2004-04-13
6642148 RELACS shrink method applied for single print resist mask for LDD or buried bitline implants using chemically amplified DUV type photoresist Kouros Ghandehari, Mark S. Chang, Angela T. Hui, Scott A. Bell, Jusuke Ogura 2003-11-04