Joerg Reiss — 6 Patents at AMD

Joerg Reiss has been granted 6 US patents while listed as an inventor at AMD. All of these patents were granted in 2006. Joerg Reiss ranks #779,687 of 4,157,543 US inventors in our database (top 18.8%). Patent records list Joerg Reiss in Sunnyvale, CA, US.

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
7108946	Method of lithographic image alignment for use with a dual mask exposure technique	Todd P. Lukanc, Sarah N. McGowan, Bhanwar Singh	2006-09-19	$35,691,000
7091088	UV-blocking etch stop layer for reducing UV-induced charging of charge storage layer in memory devices in BEOL processing	Ning Cheng, Clarence B. Ferguson, Emmanuil H. Lingunis, Minh Van Ngo, Jean Y. Yang +2 more	2006-08-15	$16,436,000
7071085	Predefined critical spaces in IC patterning to reduce line end pull back	Todd P. Lukanc, Luigi Capodieci, Christopher A. Spence, Sarah N. McGowan	2006-07-04
7027130	Device and method for determining an illumination intensity profile of an illuminator for a lithography system	Christopher A. Spence, Todd P. Lukanc, Luigi Capodieci, Sarah N. McGowan	2006-04-11	$9,016,000
7015148	Reduce line end pull back by exposing and etching space after mask one trim and etch	Todd P. Lukanc, Luigi Capodieci, Christopher A. Spence, Sarah N. McGowan	2006-03-21	$13,217,000
6995433	Microdevice having non-linear structural component and method of fabrication	Todd P. Lukanc, Sarah N. McGowan, Luigi Capodieci, Bhanwar Singh	2006-02-07	$12,481,000

Joerg Reiss — 6 Patents

Issued Patents All Time

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