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Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
TL

Todd P. Lukanc — 72 Patents

AMD: 66 patents #76 of 9,280Top 1%
Globalfoundries: 3 patents #1,029 of 4,424Top 25%
Cypress Semiconductor: 1 patents #1,365 of 1,866Top 75%
SLSpansion Llc.: 1 patents #435 of 769Top 60%
San Jose, CA: #520 of 32,062 inventorsTop 2%
California: #4,252 of 386,348 inventorsTop 2%
Overall (All Time): #27,714 of 4,157,543Top 1%
72 Patents All Time
Todd P. Lukanc has been granted 72 US patents while listed as an inventor at AMD. The first was granted in 1999 and the most recent in March 2016. Todd P. Lukanc ranks #27,714 of 4,157,543 US inventors in our database (top 0.67%). Patent records list Todd P. Lukanc in San Jose, CA, US.

Patents per Year

Patents granted per year, 1999 to 2016Bar chart with a peak of 13 patents in 2001.peak 131999: 1 patents19992000: 9 patents2001: 13 patents20012002: 8 patents2003: 13 patents20032004: 9 patents2005: 1 patents20052006: 6 patents2007: 4 patents20072008: 1 patents2009: 2 patents20092010: 1 patents2011: 1 patents20112015: 2 patents2016: 1 patents2016

Issued Patents All Time

Showing 1–25 of 72 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9274410 Method and system for automated generation of masks for spacer formation from a desired final wafer pattern Wai Lo, Christie R. K. Marrian 2016-03-01 $10,348,000
9064078 Methods and systems for designing and manufacturing optical lithography masks Piyush Verma 2015-06-23 $1,346,000
8975195 Methods for optical proximity correction in the design and fabrication of integrated circuits Christopher Heinz Clifford, Tamer Coskun 2015-03-10 $1,941,000
8003545 Method of forming an electronic device including forming features within a mask and a selective removal process Hung-Eil Kim 2011-08-23 $939,000
7657864 System and method for integrated circuit device design and manufacture using optical rule checking to screen resolution enhancement techniques Cyrus E. Tabery, Chris Haidinyak, Luigi Capodieci, Carl P. Babcock, Hung-Eil Kim +1 more 2010-02-02 $18,664,000
7543256 System and method for designing an integrated circuit device Cyrus E. Tabery, Luigi Capodieci, Carl P. Babcock, Hung-Eil Kim, Christopher A. Spence +1 more 2009-06-02 $11,563,000
7487492 Method for increasing manufacturability of a circuit layout Ajay Singhal 2009-02-03 $11,769,000
7368225 Two mask photoresist exposure pattern for dense and isolated regions Ramkumar Subramanian, Scott A. Bell, Marina V. Plat, Uzodinma Okoroanyanwu, Hung-Eil Kim 2008-05-06 $14,545,000
7313769 Optimizing an integrated circuit layout by taking into consideration layout interactions as well as extra manufacturability margin Cyrus E. Tabery, Luigi Capodieci, Carl P. Babcock, Hung-Eil Kim, Christopher A. Spence +1 more 2007-12-25
7269804 System and method for integrated circuit device design and manufacture using optical rule checking to screen resolution enhancement techniques Cyrus E. Tabery, Chris Haidinyak, Luigi Capodieci, Carl P. Babcock, Hung-Eil Kim +1 more 2007-09-11 $10,117,000
7207017 Method and system for metrology recipe generation and review and analysis of design, simulation and metrology results Cyrus E. Tabery, Chris Haidinyak, Luigi Capodieci, Carl P. Babcock, Hung-Eil Kim +1 more 2007-04-17 $14,172,000
7194725 System and method for design rule creation and selection Cyrus E. Tabery, Luigi Capodieci, Carl P. Babcock, Hung-Eil Kim, Christopher A. Spence +1 more 2007-03-20 $9,786,000
7108946 Method of lithographic image alignment for use with a dual mask exposure technique Sarah N. McGowan, Bhanwar Singh, Joerg Reiss 2006-09-19 $35,691,000
7076750 Method and apparatus for generating trenches for vias 2006-07-11 $11,570,000
7071085 Predefined critical spaces in IC patterning to reduce line end pull back Luigi Capodieci, Christopher A. Spence, Joerg Reiss, Sarah N. McGowan 2006-07-04
7027130 Device and method for determining an illumination intensity profile of an illuminator for a lithography system Christopher A. Spence, Luigi Capodieci, Joerg Reiss, Sarah N. McGowan 2006-04-11 $9,016,000
7015148 Reduce line end pull back by exposing and etching space after mask one trim and etch Luigi Capodieci, Christopher A. Spence, Joerg Reiss, Sarah N. McGowan 2006-03-21 $13,217,000
6995433 Microdevice having non-linear structural component and method of fabrication Sarah N. McGowan, Luigi Capodieci, Bhanwar Singh, Joerg Reiss 2006-02-07 $12,481,000
6974652 Lithographic photomask and method of manufacture to improve photomask test measurement Luigi Capodieci, Bhanwar Singh, Christopher A. Spence 2005-12-13 $8,414,000
6818358 Method of extending the areas of clear field phase shift generation Christopher A. Spence 2004-11-16 $6,082,000
6803178 Two mask photoresist exposure pattern for dense and isolated regions Ramkumar Subramanian, Scott A. Bell, Marina V. Plat, Uzodinma Okoroanyanwu, Hung-Eli Kim 2004-10-12 $4,245,000
6797438 Method and enhancing clear field phase shift masks with border around edges of phase regions Christopher A. Spence 2004-09-28 $1,915,000
6768204 Self-aligned conductive plugs in a semiconductor device Fei Wang, Darrell M. Erb 2004-07-27 $2,306,000
6753266 Method of enhancing gate patterning properties with reflective hard mask Scott A. Bell, Christopher F. Lyons, Marina V. Plat, Ramkumar Subramanian 2004-06-22 $4,162,000
6749971 Method of enhancing clear field phase shift masks with chrome border around phase 180 regions Christopher A. Spence 2004-06-15 $4,556,000