Issued Patents All Time
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11488887 | Thermal enablement of dies with impurity gettering | Gamal Refai-Ahmed, Suresh Ramalingam, Toshiyuki Hisamura, Suresh Parameswaran, Scott McCann +1 more | 2022-11-01 |
| 11379580 | Mixed storage of data fields | James D. Wesselkamper, Edward S. Peterson, Jason J. Moore, Steven E. McNeil, Roger D. Flateau, Jr. +1 more | 2022-07-05 |
| 11073550 | Test vehicle for package testing | Yuqing Gong, Suresh Parameswaran | 2021-07-27 |
| 10620644 | Systems and methods for on-die heat generation and temperature sensing | Suresh Parameswaran, Sarayanan Balakrishnan | 2020-04-14 |
| 10302504 | On-die temperature sensing and digitization system | Suresh Parameswaran, Ankur Jain | 2019-05-28 |
| 10262911 | Circuit for and method of testing bond connections between a first die and a second die | Yuqing Gong, Henley Liu, Myongseob Kim, Suresh Parameswaran, Cheang-Whang Chang | 2019-04-16 |
| 8810269 | Method of testing a semiconductor structure | Yuqing Gong, Henley Liu, Myongseob Kim, Suresh Parameswaran, Cheang-Whang Chang | 2014-08-19 |
| 8564023 | Integrated circuit with MOSFET fuse element | Hsung Jai Im, Sunhom Paak | 2013-10-22 |
| 8143695 | Contact fuse one time programmable memory | Serhii Tumakha, Amit Ghia | 2012-03-27 |
| 8102019 | Electrically programmable diffusion fuse | Serhii Tumakha, Amit Ghia, Jan Lodewijk de Jong | 2012-01-24 |
| 7923785 | Field effect transistor having increased carrier mobility | Qi Xiang, Jung-Suk Goo | 2011-04-12 |
| 7923811 | Electronic fuse cell with enhanced thermal gradient | Hsung Jai Im, Sunhom Paak | 2011-04-12 |
| 7839693 | Method of fabricating CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer | Sunhom Paak, Hsung Jai Im, Daniel Gitlin | 2010-11-23 |
| 7834659 | Multi-step programming of E fuse cells | Hsung Jai Im, Sunhom Paak | 2010-11-16 |
| 7724600 | Electronic fuse programming current generator with on-chip reference | Hsung Jai Im, Sunhom Paak | 2010-05-25 |
| 7710813 | Electronic fuse array | Hsung Jai Im, Sunhom Paak, Raymond C. Pang, Serhii Tumakha | 2010-05-04 |
| 7688639 | CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer | Sunhom Paak, Hsung Jai Im, Daniel Gitlin | 2010-03-30 |
| 7598749 | Integrated circuit with fuse programming damage detection | Sunhom Paak, Hsung Jai Im, Kwansuhk Oh, Raymond C. Pang | 2009-10-06 |
| 7567449 | One-time-programmable logic bit with multiple logic elements | Sunhom Paak, Hsung Jai Im | 2009-07-28 |
| 7381620 | Oxygen elimination for device processing | Hidehiko Shiraiwa, Simon S. Chan, Harpreet Sachar, Mark Randolph | 2008-06-03 |
| 7312625 | Test circuit and method of use thereof for the manufacture of integrated circuits | Sunhom Paak, Hsung Jai Im, Jan Lodewijk de Jong | 2007-12-25 |
| 7294888 | CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer | Sunhom Paak, Hsung Jai Im, Daniel Gitlin | 2007-11-13 |
| 7242102 | Bond pad structure for copper metallization having increased reliability and method for fabricating same | Inkuk Kang, Hiroyuki Kinoshita, Hajime Wada, Simon S. Chan, Cinti X. Chen | 2007-07-10 |
| 7122465 | Method for achieving increased control over interconnect line thickness across a wafer and between wafers | Cinti X. Chen, Simon S. Chan, Inkuk Kang | 2006-10-17 |
| 6995564 | Method and system for locating chip-level defects through emission imaging of a semiconductor device | Mehrdad Mahanpour, Mohammed Massoodi | 2006-02-07 |