| 8436656 |
Method and apparatus for saving power in an integrated circuit |
Martin L. Voogel, Jason Redgrave, Matt Crowley |
2013-05-07 |
|
| 7956385 |
Circuit for protecting a transistor during the manufacture of an integrated circuit device |
Yuhao Luo, Shuxian Wu, Xin Wu, Jae-Gyung Ahn, Deepak Nayak |
2011-06-07 |
$7,589,000 |
| 7936006 |
Semiconductor device with backfilled isolation |
Yuhao Luo, Deepak Nayak |
2011-05-03 |
$17,827,000 |
| 7839693 |
Method of fabricating CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer |
Sunhom Paak, Boon Yong Ang, Hsung Jai Im |
2010-11-23 |
$3,199,000 |
| 7772093 |
Method of and circuit for protecting a transistor formed on a die |
Yuhao Luo, Shuxian Wu, Xin Wu, Jae-Gyung Ahn, Deepak Nayak |
2010-08-10 |
$34,432,000 |
| 7688639 |
CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer |
Sunhom Paak, Boon Yong Ang, Hsung Jai Im |
2010-03-30 |
$14,323,000 |
| 7687797 |
Three-terminal non-volatile memory element with hybrid gate dielectric |
James Karp, Shahin Toutounchi, Michael G. Ahrens, Jongheon Jeong |
2010-03-30 |
$14,323,000 |
| 7294888 |
CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer |
Sunhom Paak, Boon Yong Ang, Hsung Jai Im |
2007-11-13 |
$8,685,000 |
| 7032194 |
Layout correction algorithms for removing stress and other physical effect induced process deviation |
Shih-Cheng Hsueh, Xiao-Jie Yuan |
2006-04-18 |
$16,221,000 |
| 6740936 |
Ballast resistor with reduced area for ESD protection |
James Karp, Jongheon Jeong, Jan Lodewijk de Jong |
2004-05-25 |
$97,571,000 |
| 6645802 |
Method of forming a zener diode |
Sheau-Suey Li, Shahin Toutounchi, Michael J. Hart, Xin Wu |
2003-11-11 |
$111,957,000 |
| 6621325 |
Structures and methods for selectively applying a well bias to portions of a programmable device |
Michael J. Hart, Steven P. Young, Hua Shen, Stephen M. Trimberger |
2003-09-16 |
$20,904,000 |
| 6549458 |
Non-volatile memory array using gate breakdown structures |
Kameswara K. Rao, Martin L. Voogel, James Karp, Shahin Toutounchi, Michael J. Hart +3 more |
2003-04-15 |
$62,996,000 |
| 6522582 |
Non-volatile memory array using gate breakdown structures |
Kameswara K. Rao, Martin L. Voogel, James Karp, Shahin Toutounchi, Michael J. Hart +3 more |
2003-02-18 |
$55,787,000 |
| 6268639 |
Electrostatic-discharge protection circuit |
Sheau-Suey Li, Shahin Toutounchi, Michael J. Hart, Xin Wu |
2001-07-31 |
$129,144,000 |
| 6266269 |
Three terminal non-volatile memory element |
James Karp, Shahin Toutounchi |
2001-07-24 |
$118,810,000 |
| 5880620 |
Pass gate circuit with body bias control |
Sheau-Suey Li, Martin L. Voogel, Tiemin Zhao |
1999-03-09 |
$24,130,000 |
| 5870327 |
Mixed mode RAM/ROM cell using antifuses |
Dennis L. Segers, Michael J. Hart |
1999-02-09 |
$25,285,000 |
