Issued Patents All Time
Showing 25 most recent of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11508667 | Embedded shield for protection of memory cells | Yan Wang | 2022-11-22 |
| 11398469 | Electrostatic discharge (ESD) protection in stacked chips | — | 2022-07-26 |
| 11177654 | Electro-static discharge (ESD) damage self-test | John K. Jennings, Michael J. Hart | 2021-11-16 |
| 11114429 | Integrated circuit device with electrostatic discharge (ESD) protection | — | 2021-09-07 |
| 11043484 | Method and apparatus of package enabled ESD protection | Hong Shi, Siow Chek Tan, Martin L. Voogel, Mohsen H. Mardi, Suresh Ramalingam +1 more | 2021-06-22 |
| 10901097 | Method and apparatus for electronics-harmful-radiation (EHR) measurement and monitoring | Michael J. Hart | 2021-01-26 |
| 10861848 | Single event latch-up (SEL) mitigation techniques | Michael J. Hart, Mohammed Fakhruddin, Pierre Maillard | 2020-12-08 |
| 10811493 | Single event latch-up (SEL) mitigation techniques | Michael J. Hart | 2020-10-20 |
| 10636869 | Mitigation for FinFET technology using deep isolation | Michael J. Hart | 2020-04-28 |
| 10522531 | Integrated circuit device and method of transmitting data in an integrated circuit device | — | 2019-12-31 |
| 10497677 | ESD protection in a stacked integrated circuit assembly | — | 2019-12-03 |
| 10325901 | Circuit for increasing the impedance of an ESD path in an input/output circuit and method of implementing the same | Mohammed Fakhruddin | 2019-06-18 |
| 10289178 | Configurable single event latch-up (SEL) and electrical overvoltage stress (EOS) detection circuit | Adrian Lynam, John K. Jennings, Umanath R. Kamath, Michael J. Hart | 2019-05-14 |
| 10015916 | Removal of electrostatic charges from an interposer via a ground pad thereof for die attach for formation of a stacked die | — | 2018-07-03 |
| 9960227 | Removal of electrostatic charges from interposer for die attachment | Michael J. Hart | 2018-05-01 |
| 9831218 | Wafer to wafer stacking | Michael J. Hart | 2017-11-28 |
| 9607948 | Method and circuits for communication in multi-die packages | Vassili Kireev | 2017-03-28 |
| 9575111 | On chip detection of electrical overstress events | Michael J. Hart, John K. Jennings | 2017-02-21 |
| 9548738 | High voltage RC-clamp for electrostatic discharge (ESD) protection | — | 2017-01-17 |
| 9484919 | Selection of logic paths for redundancy | Praful Jain, Pierre Maillard, Michael J. Hart | 2016-11-01 |
| 9483599 | Circuit design-specific failure in time rate for single event upsets | Praful Jain | 2016-11-01 |
| 9462674 | Circuits for and methods of providing a charge device model ground path using substrate taps in an integrated circuit device | Mohammed Fakhruddin, Kuok-Khian Lo | 2016-10-04 |
| 9406738 | Inductive structure formed using through silicon vias | Vassili Kireev | 2016-08-02 |
| 9379109 | Integrated circuit having improved radiation immunity | Michael J. Hart | 2016-06-28 |
| 9378322 | Preparing layouts for semiconductor circuits | — | 2016-06-28 |