Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11961823 | Forming and/or configuring stacked dies | Martin L. Voogel, Brian C. Gaide | 2024-04-16 |
| 11670585 | Power distribution for active-on-active die stack with reduced resistance | — | 2023-06-06 |
| 11270977 | Power delivery network for active-on-active stacked integrated circuits | Steven P. Young, Martin L. Voogel, Brian C. Gaide | 2022-03-08 |
| 11041211 | Power distribution for active-on-active die stack with reduced resistance | — | 2021-06-22 |
| 11043480 | Forming and/or configuring stacked dies | Martin L. Voogel, Brian C. Gaide | 2021-06-22 |
| 10908598 | Integrated circuits designed for multiple sets of criteria | — | 2021-02-02 |
| 9825632 | Circuit for and method of preventing multi-bit upsets induced by single event transients | Pierre Maillard, Michael J. Hart, Robert Fu | 2017-11-21 |
| 9628081 | Interconnect circuits having low threshold voltage P-channel transistors for a programmable integrated circuit | Michael J. Hart | 2017-04-18 |
| 9484919 | Selection of logic paths for redundancy | Pierre Maillard, James Karp, Michael J. Hart | 2016-11-01 |
| 9483599 | Circuit design-specific failure in time rate for single event upsets | James Karp | 2016-11-01 |
| 9281807 | Master-slave flip-flops and methods of implementing master-slave flip-flops in an integrated circuit | Pierre Maillard, Michael J. Hart, Sundeep Ram Gopal Agarwal, Austin H. Lesea, Jun Liu | 2016-03-08 |
| 9236353 | Integrated circuit having improved radiation immunity | James Karp, Michael J. Hart | 2016-01-12 |
| 9183338 | Single-event upset mitigation in circuit design for programmable integrated circuits | Pierre Maillard | 2015-11-10 |
| 9054684 | Single event upset enhanced architecture | Santosh Kumar Sood, Ramakrishna K. Tanikella | 2015-06-09 |
| 9000529 | Reduction of single event upsets within a semiconductor integrated circuit | James Karp, Michael J. Hart, Ramakrishna K. Tanikella | 2015-04-07 |