Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Steven P. Young — 215 Patents

AMD: 207 patents #7 of 9,280Top 1%
VAVarian: 2 patents #151 of 684Top 25%
IBM: 2 patents #32,909 of 70,183Top 50%
Boulder, CO: #3 of 5,018 inventorsTop 1%
Colorado: #14 of 40,980 inventorsTop 1%
Overall (All Time): #2,871 of 4,157,543Top 1%
215 Patents All Time
Steven P. Young has been granted 215 US patents while listed as an inventor at AMD. The first was granted in 1992 and the most recent in September 2023. Steven P. Young ranks #2,871 of 4,157,543 US inventors in our database (top 0.07%). Patent records list Steven P. Young in Boulder, CO, US.

Issued Patents All Time

Showing 1–25 of 215 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11750195 Compute dataflow architecture Brian C. Gaide 2023-09-05
11451230 Compute dataflow architecture Brian C. Gaide 2022-09-20
11270977 Power delivery network for active-on-active stacked integrated circuits Praful Jain, Martin L. Voogel, Brian C. Gaide 2022-03-08
11239203 Multi-chip stacked devices Brian C. Gaide 2022-02-01 $147,136,000
10825772 Redundancy scheme for multi-chip stacked devices Brian C. Gaide 2020-11-03
10715149 Configurable logic block (CLB) internal routing architecture for enhanced local routing and clocking improvements Eric F. Dellinger, Jay T. Young, Brian C. Gaide, Chirag Ravishankar, Davis Boyd MOORE 2020-07-14 $14,930,000
9859896 Distributed multi-die routing in a multi-chip module Brian C. Gaide, Eric F. Dellinger 2018-01-02 $44,079,000
9602108 Lut cascading circuit Brian C. Gaide, Alireza S. Kaviani 2017-03-21 $15,156,000
9509307 Interconnect multiplexers and methods of reducing contention currents in an interconnect multiplexer Vikram Santurkar, Anil Kumar Kandala, Santosh Yachareni, Shidong Zhou, Robert Fu +3 more 2016-11-29 $19,852,000
9438244 Circuits for and methods of controlling power within an integrated circuit Santosh Kumar Sood, Brian C. Gaide 2016-09-06 $11,996,000
9411554 Signed multiplier circuit utilizing a uniform array of logic blocks Brian C. Gaide 2016-08-09 $8,970,000
9177634 Two gate pitch FPGA memory cell Yang Hee Song, Nui Chong 2015-11-03 $14,054,000
9058454 Method and apparatus to reduce power segmentation overhead within an integrated circuit James Karp, Michael J. Hart 2015-06-16 $23,723,000
9002915 Circuits for shifting bussed data Brian C. Gaide 2015-04-07 $7,974,000
8937491 Clock network architecture Brian C. Gaide, Trevor J. Bauer, Robert M. Ondris, Dinesh D. Gaitonde 2015-01-20 $8,833,000
8933447 Method and apparatus for programmable device testing in stacked die applications Arifur Rahman, Ramakrishna K. Tanikella, Trevor J. Bauer, Brian C. Gaide 2015-01-13 $20,591,000
8773166 Self-timed single track circuit Brian C. Gaide 2014-07-08 $6,269,000
8773164 Programmable interconnect network Brian C. Gaide 2014-07-08 $6,269,000
8768570 Wheel cover system for a 3-wheeled motorcycle 2014-07-01
8706793 Multiplier circuits with optional shift function 2014-04-22 $13,693,000
8543291 Hydraulic wheel suspension system for a 3-wheeled motorcycle 2013-09-24
8536895 Configuration of a multi-die integrated circuit Weiguang Lu, Eric E. Edwards, Paul-Hugo Lamarche, Brian C. Gaide, Joe Eddie Leyba, II 2013-09-17 $5,000,000
8527572 Multiplier architecture utilizing a uniform array of logic blocks, and methods of using the same Brian C. Gaide 2013-09-03 $50,360,000
8495122 Programmable device with dynamic DSP architecture James M. Simkins, Jennifer Wong, Bernard J. New, Alvin Y. Ching 2013-07-23 $9,455,000
8301988 Error checking parity and syndrome of a block of data with relocated parity bits Warren E. Cory, David P. Schultz 2012-10-30