Warren E. Cory — 22 Patents at AMD

Warren E. Cory has been granted 22 US patents while listed as an inventor at AMD. The first was granted in 2003 and the most recent in March 2025. Warren E. Cory ranks #189,202 of 4,157,543 US inventors in our database (top 4.6%). Patent records list Warren E. Cory in Redwood City, CA, US.

Issued Patents All Time

Showing 1–22 of 22 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12248761	Deterministic reset mechanism for asynchronous gearbox FIFOs for predictable latency	Riyas Noorudeen Remla	2025-03-11
10623174	Low latency data transfer technique for mesochronous divided clocks	Riyas Noorudeen Remla, Chee Chong Chan	2020-04-14	$21,268,000
10528513	Circuit for and method of providing a programmable connector of an integrated circuit device	Chee Chong Chan, Jason R. Bergendahl	2020-01-07	$31,713,000
10038450	Circuits for and methods of transmitting data in an integrated circuit	—	2018-07-31	$15,644,000
10033523	Circuit for and method of measuring latency in an integrated circuit	Riyas Noorudeen Remla	2018-07-24	$14,986,000
8411703	Method and apparatus for a reduced lane-lane skew, low-latency transmission system	—	2013-04-02	$5,127,000
8301988	Error checking parity and syndrome of a block of data with relocated parity bits	David P. Schultz, Steven P. Young	2012-10-30
8245102	Error checking parity and syndrome of a block of data with relocated parity bits	David P. Schultz, Steven P. Young	2012-08-14	$8,084,000
7913104	Method and apparatus for receive channel data alignment with minimized latency variation	Donald C. Stark, Dean Liu, Clemenz Portmann	2011-03-22
7895509	Error checking parity and syndrome of a block of data with relocated parity bits	David P. Schultz, Steven P. Young	2011-02-22	$6,999,000
7623660	Method and system for pipelined decryption	—	2009-11-24	$15,987,000
7519747	Variable latency buffer and method of operation	Joseph Neil Kryzak	2009-04-14	$6,987,000
7426678	Error checking parity and syndrome of a block of data with relocated parity bits	David P. Schultz, Steven P. Young	2008-09-16	$6,646,000
7382823	Channel bonding control logic architecture	—	2008-06-03	$12,611,000
7295639	Distributed adaptive channel bonding control for improved tolerance of inter-channel skew	—	2007-11-13	$8,685,000
7187709	High speed configurable transceiver architecture	Suresh M. Menon, Atul V. Ghia, Paul T. Sasaki, Philip M. Freidin, Santiago G. Asuncion +4 more	2007-03-06	$5,029,000
7111220	Network physical layer with embedded multi-standard CRC generator	Paul T. Sasaki, Suresh M. Menon, Atul V. Ghia, Hare K. Verma, Philip M. Freidin	2006-09-19	$3,343,000
7099426	Flexible channel bonding and clock correction operations on a multi-block data path	Atul V. Ghia	2006-08-29	$7,450,000
7088767	Method and apparatus for operating a transceiver in different data rates	—	2006-08-08	$10,234,000
6970013	Variable data width converter	—	2005-11-29	$31,514,000
6960933	Variable data width operation in multi-gigabit transceivers on a programmable logic device	Hare K. Verma, Atul V. Ghia, Paul T. Sasaki, Suresh M. Menon	2005-11-01	$8,703,000
6617877	Variable data width operation in multi-gigabit transceivers on a programmable logic device	Hare K. Verma, Atul V. Ghia, Paul T. Sasaki, Suresh M. Menon	2003-09-09	$21,199,000

Warren E. Cory — 22 Patents

Issued Patents All Time

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