Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Circuits for and methods of transmitting data in an integrated circuit

Circuits for and methods of transmitting data in an integrated circuit

US Patent 10038450 · Granted Jul 31, 2018

Estimated economic value: $15,644,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Deterministic reset mechanism for asynchronous gearbox FIFOs for predictable lat2025
Low latency data transfer technique for mesochronous divided clocks2020
Circuit for and method of providing a programmable connector of an integrated ci2020
Circuit for and method of measuring latency in an integrated circuit2018
Method and apparatus for a reduced lane-lane skew, low-latency transmission syst2013
Error checking parity and syndrome of a block of data with relocated parity bits2012
Error checking parity and syndrome of a block of data with relocated parity bits2012
Method and apparatus for receive channel data alignment with minimized latency v2011
Error checking parity and syndrome of a block of data with relocated parity bits2011
Method and system for pipelined decryption2009
Variable latency buffer and method of operation2009
Error checking parity and syndrome of a block of data with relocated parity bits2008