| 8467900 |
Dispense verification meters |
— |
2013-06-18 |
| 8185237 |
Dispense verification meters |
— |
2012-05-22 |
| 7187709 |
High speed configurable transceiver architecture |
Suresh M. Menon, Atul V. Ghia, Warren E. Cory, Paul T. Sasaki, Santiago G. Asuncion +4 more |
2007-03-06 |
| 7111220 |
Network physical layer with embedded multi-standard CRC generator |
Paul T. Sasaki, Suresh M. Menon, Atul V. Ghia, Warren E. Cory, Hare K. Verma |
2006-09-19 |
| 6237014 |
Correlator method and apparatus |
David G. Decker, Norman F. Krasner |
2001-05-22 |
| 6148313 |
Correlator method and apparatus |
Michael J. Serrone, Norman F. Krasner |
2000-11-14 |
| 5995988 |
Configurable parallel and bit serial load apparatus |
Stephen M. Trimberger, John E. Mahoney, Charles R. Erickson |
1999-11-30 |
| 5961576 |
Configurable parallel and bit serial load apparatus |
Stephen M. Trimberger, John E. Mahoney, Charles R. Erickson |
1999-10-05 |
| 5844829 |
Configurable parallel and bit serial load apparatus |
Stephen M. Trimberger, John E. Mahoney, Charles R. Erickson |
1998-12-01 |
| 5742531 |
Configurable parallel and bit serial load apparatus |
Stephen M. Trimberger, John E. Mahoney, Charles R. Erickson |
1998-04-21 |
| 5726584 |
Virtual high density programmable integrated circuit having addressable shared memory cells |
— |
1998-03-10 |
| 5661660 |
Method for providing multiple function symbols |
— |
1997-08-26 |
| 5646564 |
Phase-locked delay loop for clock correction |
Charles R. Erickson, Kerry M. Pierce |
1997-07-08 |
| 5631577 |
Synchronous dual port RAM |
Edmond Y. Cheung, Charles R. Erickson, Tsung-Lu Syu |
1997-05-20 |
| 5598424 |
Error detection structure and method for serial or parallel data stream using partial polynomial check |
Charles R. Erickson, William A. Wilkie |
1997-01-28 |
| 5566123 |
Synchronous dual port ram |
Edmond Y. Cheung, Charles R. Erickson, Tsung-Lu Syu |
1996-10-15 |
| 5553301 |
Programmable sequencher having internal components which are microprocessor read/write interfacable |
Bernard J. New |
1996-09-03 |
| 5414377 |
Logic block with look-up table for configuration and memory |
— |
1995-05-09 |
| 5410194 |
Asynchronous or synchronous load multifunction flip-flop |
Charles R. Erickson |
1995-04-25 |
| 5321704 |
Error detection structure and method using partial polynomial check |
Charles R. Erickson |
1994-06-14 |
| 4967346 |
Universal microprocessor interface circuit |
— |
1990-10-30 |
| 4935929 |
Diagnostic circiut for digital systems |
Steven B. Sidman |
1990-06-19 |
| 4933837 |
Methods and apparatus for optimizing instruction processing in computer systems employing a combination of instruction cache and high speed consecutive transfer memories |
— |
1990-06-12 |
| 4926323 |
Streamlined instruction processor |
Gigy Baror, Brian W. Case, Rod G. Fleck, Smeeta Gupta, William M. Johnson +4 more |
1990-05-15 |
| 4835414 |
Flexible, reconfigurable terminal pin |
— |
1989-05-30 |
