Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6507899 | Interface for a memory unit | Klaus Oberlaender, Sabeen Randhawa, Yannick Martelloni, Manfred Henftling, Rami Zemach +5 more | 2003-01-14 |
| 6405273 | Data processing device with memory coupling unit | Rod G. Fleck, Klaus Oberlaender, Alfred Eder, Le Trong Nguyen | 2002-06-11 |
| 6076159 | Execution of a loop instructing in a loop pipeline after detection of a first occurrence of the loop instruction in an integer pipeline | Rod G. Fleck, Ole H. Moller | 2000-06-13 |
| 6014728 | Organization of an integrated cache unit for flexible usage in supporting multiprocessor operations | — | 2000-01-11 |
| 5627992 | Organization of an integrated cache unit for flexible usage in supporting microprocessor operations | — | 1997-05-06 |
| 5185878 | Programmable cache memory as well as system incorporating same and method of operating programmable cache memory | William M. Johnson | 1993-02-09 |
| 5136691 | Methods and apparatus for caching interlock variables in an integrated cache memory | — | 1992-08-04 |
| 5025366 | Organization of an integrated cache unit for flexible usage in cache system design | — | 1991-06-18 |
| 4926323 | Streamlined instruction processor | Brian W. Case, Rod G. Fleck, Philip M. Freidin, Smeeta Gupta, William M. Johnson +4 more | 1990-05-15 |
| 4851990 | High performance processor interface between a single chip processor and off chip memory means having a dedicated and shared bus structure | William M. Johnson | 1989-07-25 |
| 4761567 | Clock scheme for VLSI systems | Donald M. Walters, Jr. | 1988-08-02 |