| 6470373 |
Sum interval detector |
— |
2002-10-22 |
| 6076159 |
Execution of a loop instructing in a loop pipeline after detection of a first occurrence of the loop instruction in an integer pipeline |
Rod G. Fleck, Gigy Baror |
2000-06-13 |
| 4926323 |
Streamlined instruction processor |
Gigy Baror, Brian W. Case, Rod G. Fleck, Philip M. Freidin, Smeeta Gupta +4 more |
1990-05-15 |
| 4868735 |
Interruptible structured microprogrammed sixteen-bit address sequence controller |
Sanjay Iyer, Paul P. L. Chu |
1989-09-19 |
| 4777588 |
General-purpose register file optimized for intraprocedural register allocation, procedure calls, and multitasking performance |
Brian W. Case, Rod G. Fleck, William M. Johnson, Cheng-Gang Kong |
1988-10-11 |
| 4777587 |
System for processing single-cycle branch instruction in a pipeline having relative, absolute, indirect and trap addresses |
Brian W. Case, Rod G. Fleck, Cheng-Gang Kong |
1988-10-11 |
| 4760374 |
Bounds checker |
— |
1988-07-26 |
| 4734852 |
Mechanism for performing data references to storage in parallel with instruction execution on a reduced instruction-set processor |
William M. Johnson, Rod G. Fleck, Cheng-Gang Kong |
1988-03-29 |
| 4719565 |
Interrupt and trap handling in microprogram sequencer |
— |
1988-01-12 |
| 4610004 |
Expandable four-port register file |
Paul Po Loi Chu |
1986-09-02 |