Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9351739 | Tunneling device | Chris Staubly, Chase Dickerson | 2016-05-31 |
| 6864698 | Hybrid cooling system for automatic test equipment | Ray Mirkhani | 2005-03-08 |
| 5995988 | Configurable parallel and bit serial load apparatus | Philip M. Freidin, Stephen M. Trimberger, Charles R. Erickson | 1999-11-30 |
| 5961576 | Configurable parallel and bit serial load apparatus | Philip M. Freidin, Stephen M. Trimberger, Charles R. Erickson | 1999-10-05 |
| 5844829 | Configurable parallel and bit serial load apparatus | Philip M. Freidin, Stephen M. Trimberger, Charles R. Erickson | 1998-12-01 |
| 5742531 | Configurable parallel and bit serial load apparatus | Philip M. Freidin, Stephen M. Trimberger, Charles R. Erickson | 1998-04-21 |
| 5712579 | Deskewed clock distribution network with edge clock | Khue Duong, Stephen M. Trimberger, Robert O. Conn | 1998-01-27 |
| 5694056 | Fast pipeline frame full detector | Stephen M. Trimberger, Charles R. Erickson | 1997-12-02 |
| 5367207 | Structure and method for programming antifuses in an integrated circuit array | F. Erich Goetting, David B. Parlour | 1994-11-22 |
| 5234092 | Control valve assembly with concentric spools | — | 1993-08-10 |
| 5155432 | System for scan testing of logic circuit networks | — | 1992-10-13 |
| 5068603 | Structure and method for producing mask-programmed integrated circuits which are pin compatible substitutes for memory-configured logic arrays | — | 1991-11-26 |
| 5047710 | System for scan testing of logic circuit networks | — | 1991-09-10 |
| 4855669 | System for scan testing of logic circuit networks | — | 1989-08-08 |
| 4805752 | Variable capacity torque transmitter | John D. Malloy, III | 1989-02-21 |
| 4746822 | CMOS power-on reset circuit | — | 1988-05-24 |
| 4610177 | Preselected multiratio transmission | — | 1986-09-09 |