Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10860896 | FPGA device for image classification | George Totolos, Jr., Joshua Oren Silberman, Daniel Leland Strother, Carlos Vallespi-Gonzalez | 2020-12-08 |
| 10255525 | FPGA device for image classification | George Totolos, Jr., Joshua Oren Silberman, Daniel Leland Strother, Carlos Vallespi-Gonzalez | 2019-04-09 |
| 9639416 | CRC circuits with extended cycles | Christopher D. Ebeling, Michael Glenn Wrighton, Michael A. Baxter | 2017-05-02 |
| 9117046 | Method of generating data for estimating resource requirements for a circuit design | Paul R. Schumacher, Ian Miller, Jorn W. Janneck, Pradip K. Jha | 2015-08-25 |
| 8595391 | Automatic queue sizing for dataflow applications | Ian Miller, Jorn W. Janneck | 2013-11-26 |
| 8572432 | Method and apparatus for processing an event notification in a concurrent processing system | Jorn W. Janneck, Ian Miller | 2013-10-29 |
| 8402409 | Method and apparatus for supporting run-time reconfiguration in a programmable logic integrated circuit | Jorn W. Janneck, Paul R. Schumacher | 2013-03-19 |
| 8402164 | Asynchronous communication network and methods of enabling the asynchronous communication of data in an integrated circuit | Jorn W. Janneck, Ian Miller | 2013-03-19 |
| 8146040 | Method of evaluating an architecture for an integrated circuit device | Jorn W. Janneck, Ian Miller | 2012-03-27 |
| 8001510 | Automated method of architecture mapping selection from constrained high level language description via element characterization | Ian Miller, Jorn W. Janneck, Paul R. Schumacher | 2011-08-16 |
| 7979835 | Method of estimating resource requirements for a circuit design | Paul R. Schumacher, Ian Miller, Jorn W. Janneck, Pradip K. Jha | 2011-07-12 |
| 7822886 | Dataflow control for application with timing parameters | Ian Miller, Jorn W. Janneck | 2010-10-26 |
| 7761272 | Method and apparatus for processing a dataflow description of a digital processing system | Jorn W. Janneck, Paul R. Schumacher | 2010-07-20 |
| 7496869 | Method and apparatus for implementing a program language description of a circuit design for an integrated circuit | Jorn W. Janneck | 2009-02-24 |
| 7437582 | Power control in a data flow processing architecture | — | 2008-10-14 |
| 7380232 | Method and apparatus for designing a system for implementation in a programmable logic device | Paul R. Schumacher, Jorn W. Janneck | 2008-05-27 |
| 6904527 | Intellectual property protection in a programmable logic device | Richard S. Ballantyne | 2005-06-07 |
| 5867396 | Method and apparatus for making incremental changes to an integrated circuit design | — | 1999-02-02 |
| 5574634 | Regulator for pumped voltage generator | Roger David Carpenter | 1996-11-12 |
| 5498979 | Adaptive programming method for antifuse technology | F. Erich Goetting, Stephen M. Trimberger, Edel M. Young | 1996-03-12 |
| 5386154 | Compact logic cell for field programmable gate array chip | F. Erich Goetting, Stephen M. Trimberger | 1995-01-31 |
| 5367207 | Structure and method for programming antifuses in an integrated circuit array | F. Erich Goetting, John E. Mahoney | 1994-11-22 |
| 5349248 | Adaptive programming method for antifuse technology | F. Erich Goetting, Stephen M. Trimberger | 1994-09-20 |