| 10354706 |
Delaying start of user design execution |
Trevis Chandler |
2019-07-16 |
| 10014865 |
Clock management block |
Kent R. Townley, Hamish T. Fallside, Prasun K. Raha |
2018-07-03 |
| 9954530 |
Implementation of related clocks |
Michael Glenn Wrighton, Andrew Caldwell, Kent R. Townley |
2018-04-24 |
| 9639416 |
CRC circuits with extended cycles |
David B. Parlour, Michael Glenn Wrighton, Michael A. Baxter |
2017-05-02 |
| 9257986 |
Rescaling |
Scott J. Weber, Andrew Caldwell, Steven Teig, Timothy J. Callahan, Hung Q. Nguyen +2 more |
2016-02-09 |
| 9203397 |
Delaying start of user design execution |
Trevis Chandler |
2015-12-01 |
| 9148151 |
Configurable storage elements |
Steven Teig, Martin L. Voogel, Andrew Caldwell |
2015-09-29 |
| 9000801 |
Implementation of related clocks |
Michael Glenn Wrighton, Andrew Caldwell, Kent R. Townley |
2015-04-07 |
| 8996906 |
Clock management block |
Kent R. Townley, Hamish T. Fallside, Prasun K. Raha |
2015-03-31 |
| 8788987 |
Rescaling |
Scott J. Weber, Andrew Caldwell, Steven Teig, Timothy J. Callahan, Hung Q. Nguyen +2 more |
2014-07-22 |
| 8650514 |
Rescaling |
Scott J. Weber, Andrew Caldwell, Steven Teig, Timothy J. Callahan, Hung Q. Nguyen +2 more |
2014-02-11 |
| 8225187 |
Method and apparatus for implementing a cyclic redundancy check circuit |
David P. Schultz |
2012-07-17 |
| 7254691 |
Queuing and aligning data |
— |
2007-08-07 |
| 6871379 |
Method and apparatus for appliance installation and leveling |
Brian Wylie |
2005-03-29 |
| 6864715 |
Windowing circuit for aligning data and clock signals |
Trevor J. Bauer, Steven P. Young, Jason R. Bergendahl, Arthur J. Behiel |
2005-03-08 |
| 6798241 |
Methods for aligning data and clock signals |
Trevor J. Bauer, Steven P. Young, Jason R. Bergendahl, Arthur J. Behiel |
2004-09-28 |
| 6434642 |
FIFO memory system and method with improved determination of full and empty conditions and amount of data stored |
Nicolas John Camilleri, Peter H. Alfke |
2002-08-13 |
| 6405269 |
FIFO memory including a comparator circuit for determining full/empty conditions using mode control and carry chain multiplexers |
Nicolas John Camilleri |
2002-06-11 |