| 8001511 |
Methods of implementing and modeling interconnect lines at optional boundaries in multi-product programmable IC dies |
Trevor J. Bauer, Jeffrey V. Lindholm, Bruce E. Talley, Ramakrishna K. Tanikella, Steven P. Young |
2011-08-16 |
$5,707,000 |
| 7599299 |
Dynamic reconfiguration of a system monitor (DRPORT) |
John McGrath, Anthony J. Collins |
2009-10-06 |
$6,100,000 |
| 7498192 |
Methods of providing a family of related integrated circuits of different sizes |
Trevor J. Bauer, Patrick J. McGuire, Bruce E. Talley, Paul Ying-Fung Wu, Steven P. Young |
2009-03-03 |
$7,174,000 |
| 7499513 |
Method and apparatus for providing frequency synthesis and phase alignment in an integrated circuit |
David E. Tetzlaff, Steven P. Young, Marwan Hassoun, Moises E. Robinson |
2009-03-03 |
$7,174,000 |
| 7491576 |
Yield-enhancing methods of providing a family of scaled integrated circuits |
Steven P. Young, Trevor J. Bauer, P. Hugo Lamarche, Patrick J. McGuire, Kwansuhk Oh +3 more |
2009-02-17 |
$6,048,000 |
| 7451421 |
Methods of implementing and modeling interconnect lines at optional boundaries in multi-product programmable IC dies |
Trevor J. Bauer, Jeffrey V. Lindholm, Bruce E. Talley, Ramakrishna K. Tanikella, Steven P. Young |
2008-11-11 |
$3,775,000 |
| 7402443 |
Methods of providing families of integrated circuits with similar dies partially disabled using product selection codes |
Raymond C. Pang, Trevor J. Bauer, Bruce E. Talley, Steven P. Young |
2008-07-22 |
$7,616,000 |
| 7345507 |
Multi-product die configurable as two or more programmable integrated circuits of different logic capacities |
Steven P. Young, Trevor J. Bauer, P. Hugo Lamarche, Patrick J. McGuire, Kwansuhk Oh +3 more |
2008-03-18 |
$3,588,000 |
| 7235999 |
System monitor in a programmable logic device |
John K. Jennings, Anthony J. Collins, Patrick J. Quinn |
2007-06-26 |
$8,288,000 |
| 7233532 |
Reconfiguration port for dynamic reconfiguration-system monitor interface |
Vasisht Mantra Vadi, David P. Schultz, John D. Logue, John McGrath, Anthony J. Collins |
2007-06-19 |
$8,714,000 |
| 7230445 |
System monitor in a programmable logic device |
John K. Jennings, Anthony J. Collins, Patrick J. Quinn |
2007-06-12 |
$51,167,000 |
| 7218137 |
Reconfiguration port for dynamic reconfiguration |
Vasisht Mantra Vadi, David P. Schultz, John D. Logue, John McGrath, Anthony J. Collins |
2007-05-15 |
$4,958,000 |
| 7187742 |
Synchronized multi-output digital clock manager |
John D. Logue, Andrew K. Percey |
2007-03-06 |
$5,029,000 |
| 7138820 |
System monitor in a programmable logic device |
John K. Jennings, Anthony J. Collins, Patrick J. Quinn |
2006-11-21 |
$5,026,000 |
| 7126372 |
Reconfiguration port for dynamic reconfiguration—sub-frame access for reconfiguration |
Vasisht Mantra Vadi, David P. Schultz, John D. Logue, John McGrath, Anthony J. Collins |
2006-10-24 |
$12,015,000 |
| 7109750 |
Reconfiguration port for dynamic reconfiguration-controller |
Vasisht Mantra Vadi, David P. Schultz, John D. Logue, John McGrath, Anthony J. Collins |
2006-09-19 |
$3,343,000 |
| 7010014 |
Digital spread spectrum circuitry |
Andrew K. Percey, John D. Logue, Paul G. Hyland |
2006-03-07 |
$30,217,000 |
| 6775342 |
Digital phase shifter |
Steven P. Young, John D. Logue, Andrew K. Percey, Alvin Y. Ching |
2004-08-10 |
$22,472,000 |
| 6587534 |
Delay lock loop with clock phase shifter |
Joseph H. Hassoun, John D. Logue |
2003-07-01 |
$60,103,000 |
| 6525562 |
Programmable logic device capable of preserving state data during partial or complete reconfiguration |
David P. Schultz, Lawrence C. Hung |
2003-02-25 |
$13,505,000 |
| 6507211 |
Programmable logic device capable of preserving user data during partial or complete reconfiguration |
David P. Schultz, Lawrence C. Hung |
2003-01-14 |
$17,679,000 |
| 6448809 |
FPGA with a plurality of input reference voltage levels |
Scott O. Frake, Venu M. Kondapalli, Steven P. Young |
2002-09-10 |
$24,871,000 |
| 6445232 |
Digital clock multiplier and divider with output waveform shaping |
John D. Logue |
2002-09-03 |
$19,444,000 |
| 6441641 |
Programmable logic device with partial battery backup |
Raymond C. Pang, Venu M. Kondapalli, Jane W. Sowards, Scott O. Frake, Jennifer Wong +2 more |
2002-08-27 |
$53,701,000 |
| 6429682 |
Configuration bus interface circuit for FPGAs |
David P. Schultz, Lawrence C. Hung |
2002-08-06 |
$14,655,000 |
