Issued Patents All Time
Showing 25 most recent of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12249988 | Circuits and methods for detecting decreases in a supply voltage in an integrated circuit | Ping-Chen Liu, Guang Chen | 2025-03-11 |
| 7804719 | Programmable logic block having reduced output delay during RAM write processes when programmed to function in RAM mode | Manoj Chirania | 2010-09-28 |
| 7518396 | Apparatus and method for reconfiguring a programmable logic device | Wei Guang Lu, P. Hugo Lamarche | 2009-04-14 |
| 7468616 | Circuit for and method of generating a delay in an input/output port of an integrated circuit device | Prasad Rau | 2008-12-23 |
| 7456654 | Method and apparatus for a programmable level translator | Prasad Rau, Jason R. Bergendahl, Qi Zhang | 2008-11-25 |
| 7382157 | Interconnect driver circuits for dynamic logic | Steven P. Young, Ramakrishna K. Tanikella, Manoj Chirania | 2008-06-03 |
| 7375552 | Programmable logic block with dedicated and selectable lookup table outputs coupled to general interconnect structure | Steven P. Young, Trevor J. Bauer, Manoj Chirania | 2008-05-20 |
| 7283409 | Data monitoring for single event upset in a programmable logic device | Martin L. Voogel, David P. Schultz, Vasisht Mantra Vadi, Philip D. Costello | 2007-10-16 |
| 7284226 | Methods and structures of providing modular integrated circuits | — | 2007-10-16 |
| 7268587 | Programmable logic block with carry chains providing lookahead functions of different lengths | Tien Duc Pham, Manoj Chirania, Steven P. Young | 2007-09-11 |
| 7265576 | Programmable lookup table with dual input and output terminals in RAM mode | Trevor J. Bauer, Manoj Chirania, Philip D. Costello, Steven P. Young | 2007-09-04 |
| 7215138 | Programmable lookup table with dual input and output terminals in shift register mode | Trevor J. Bauer, Manoj Chirania, Philip D. Costello, Steven P. Young | 2007-05-08 |
| 7202697 | Programmable logic block having improved performance when functioning in shift register mode | Manoj Chirania | 2007-04-10 |
| 7119570 | Method of measuring performance of a semiconductor device and circuit for the same | Manoj Chirania, Martin L. Voogel, Philip D. Costello | 2006-10-10 |
| 7116131 | High performance programmable logic devices utilizing dynamic circuitry | Manoj Chirania | 2006-10-03 |
| 7109746 | Data monitoring for single event upset in a programmable logic device | Martin L. Voogel, David P. Schultz, Vasisht Mantra Vadi, Philip D. Costello | 2006-09-19 |
| 7109783 | Method and apparatus for voltage regulation within an integrated circuit | Martin L. Voogel, Philip D. Costello | 2006-09-19 |
| 7075332 | Six-input look-up table and associated memory control circuitry for use in a field programmable gate array | Steven P. Young, Ramakrishna K. Tanikella | 2006-07-11 |
| 7075333 | Programmable circuit optionally configurable as a lookup table or a wide multiplexer | Kamal Chaudhary, Philip D. Costello | 2006-07-11 |
| 7061271 | Six-input look-up table for use in a field programmable gate array | Steven P. Young, Ramakrishna K. Tanikella | 2006-06-13 |
| 7053654 | PLD lookup table including transistors of more than one oxide thickness | Steven P. Young, Martin L. Voogel | 2006-05-30 |
| 6998872 | Lookup table circuit optionally configurable as two or more smaller lookup tables with independent inputs | Manoj Chirania | 2006-02-14 |
| 6949951 | Integrated circuit multiplexer including transistors of more than one oxide thickness | Steven P. Young, Michael J. Hart, Martin L. Voogel | 2005-09-27 |
| 6768335 | Integrated circuit multiplexer including transistors of more than one oxide thickness | Steven P. Young, Michael J. Hart, Martin L. Voogel | 2004-07-27 |
| 6768338 | PLD lookup table including transistors of more than one oxide thickness | Steven P. Young, Martin L. Voogel | 2004-07-27 |