| 9509307 |
Interconnect multiplexers and methods of reducing contention currents in an interconnect multiplexer |
Vikram Santurkar, Anil Kumar Kandala, Santosh Yachareni, Shidong Zhou, Robert Fu +3 more |
2016-11-29 |
$19,852,000 |
| 7653891 |
Method of reducing power of a circuit |
Jason H. Anderson, Manoj Chirania, Subodh Gupta |
2010-01-26 |
$4,137,000 |
| 7600204 |
Method for simulation of negative bias and temperature instability |
Manoj Chirania, Robert Fu |
2009-10-06 |
$6,100,000 |
| 7518394 |
Process monitor vehicle |
Manoj Chirania |
2009-04-14 |
$6,987,000 |
| 7283409 |
Data monitoring for single event upset in a programmable logic device |
Martin L. Voogel, David P. Schultz, Vasisht Mantra Vadi, Venu M. Kondapalli |
2007-10-16 |
$5,307,000 |
| 7265576 |
Programmable lookup table with dual input and output terminals in RAM mode |
Venu M. Kondapalli, Trevor J. Bauer, Manoj Chirania, Steven P. Young |
2007-09-04 |
$4,969,000 |
| 7256612 |
Programmable logic block providing carry chain with programmable initialization values |
Steven P. Young, Tien Duc Pham |
2007-08-14 |
$22,431,000 |
| 7215138 |
Programmable lookup table with dual input and output terminals in shift register mode |
Venu M. Kondapalli, Trevor J. Bauer, Manoj Chirania, Steven P. Young |
2007-05-08 |
$9,696,000 |
| 7187709 |
High speed configurable transceiver architecture |
Suresh M. Menon, Atul V. Ghia, Warren E. Cory, Paul T. Sasaki, Philip M. Freidin +4 more |
2007-03-06 |
$5,029,000 |
| 7119570 |
Method of measuring performance of a semiconductor device and circuit for the same |
Manoj Chirania, Venu M. Kondapalli, Martin L. Voogel |
2006-10-10 |
$33,455,000 |
| 7109746 |
Data monitoring for single event upset in a programmable logic device |
Martin L. Voogel, David P. Schultz, Vasisht Mantra Vadi, Venu M. Kondapalli |
2006-09-19 |
$3,343,000 |
| 7109783 |
Method and apparatus for voltage regulation within an integrated circuit |
Venu M. Kondapalli, Martin L. Voogel |
2006-09-19 |
$3,343,000 |
| 7075333 |
Programmable circuit optionally configurable as a lookup table or a wide multiplexer |
Kamal Chaudhary, Venu M. Kondapalli |
2006-07-11 |
$9,065,000 |
| 6911842 |
Low jitter clock for a physical media access sublayer on a field programmable gate array |
Atul V. Ghia, Vasisht Mantra Vadi, Adebabay M. Bekele, Hare K. Verma |
2005-06-28 |
$10,163,000 |
| 6822894 |
Single event upset in SRAM cells in FPGAs with leaky gate transistors |
Martin L. Voogel |
2004-11-23 |
$44,331,000 |
| 6753722 |
Method and apparatus for voltage regulation within an integrated circuit |
Venu M. Kondapalli, Martin L. Voogel |
2004-06-22 |
$14,473,000 |
| 5936424 |
High speed bus with tree structure for selecting bus driver |
Steven P. Young, Kamal Chaudhary, Shekhar Bapat, Sridhar Krishnamurthy |
1999-08-10 |
$73,362,000 |
| 5764564 |
Write-assisted memory cell and method of operating same |
Scott O. Frake |
1998-06-09 |
$11,764,000 |
| 5216291 |
Buffer circuit having high stability and low quiescent current consumption |
Evert Seevinck |
1993-06-01 |
|
| 5173656 |
Reference generator for generating a reference voltage and a reference current |
Evert Seevinck |
1992-12-22 |
|
| 4850761 |
Milling process and tool |
Edgar Breuer, Konrad Gondek, Andreas Hauswirth, Richard Schmid |
1989-07-25 |
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