Issued Patents All Time
Showing 25 most recent of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12073145 | Modular vehicle sound system | William H. Jones | 2024-08-27 |
| 12060979 | LED headlamp system with brightness control | William H. Jones, Edward Robertson, William Lauer, John Wiley Horton | 2024-08-13 |
| 11816406 | High-level synthesis (HLS) method and apparatus to specify parallelism in computer hardware | Jongsok Choi, Ruolong Lian, Andrew Christopher Canis, Muhammad R. Soliman | 2023-11-14 |
| 11767960 | LED headlamp system with brightness control | William H. Jones, Jr, Edward Robertson, William Lauer, John Wiley Horton | 2023-09-26 |
| D996146 | Drinking straw mountable container | — | 2023-08-22 |
| 11654997 | J-gate motorcycle clutch adaptor assemblies and related methods and systems | — | 2023-05-23 |
| 11055456 | High-level synthesis (HLS) method and apparatus to specify pipeline and spatial parallelism in computer hardware | Jongsok Choi, Ruolong Lian, Andrew Christopher Canis | 2021-07-06 |
| 10933939 | J-Gate motorcycle clutch adaptor assemblies and related methods and systems | — | 2021-03-02 |
| 10579762 | High-level synthesis (HLS) method and apparatus to specify pipeline and spatial parallelism in computer hardware | Jongsok Choi, Ruolong Lian, Andrew Christopher Canis | 2020-03-03 |
| 9742405 | Semiconductor integrated circuit | Hirotaka Tamura, Hisanori Fujisawa, Hiroaki Fujimoto, Safeen Huda | 2017-08-22 |
| 9213796 | Method for designing semiconductor integrated circuit and program | Hirotaka Tamura, Safeen Huda, Hiroaki Fujimoto | 2015-12-15 |
| 9003413 | Thread synchronization by transitioning threads to spin lock and sleep state | Taneem Ahmed, Sandor S. Kalman | 2015-04-07 |
| 8671379 | Multi-threaded deterministic router | Jitu Jain, Vinay Verma, Taneem Ahmed, Sandor S. Kalman, Sanjeev Kwatra +2 more | 2014-03-11 |
| 8312409 | Multi-threaded deterministic router | Gitu Jain, Vinay Verma, Taneem Ahmed, Sandor S. Kalman, Sanjeev Kwatra +2 more | 2012-11-13 |
| 8205180 | Method of and system for generating a logic configuration for an integrated circuit | Qiang Wang | 2012-06-19 |
| 8201127 | Method and apparatus for reducing clock signal power consumption within an integrated circuit | Qiang Wang, Subodh Gupta | 2012-06-12 |
| 7797665 | Patterns for routing nets in a programmable logic device | Hui Xu, Vinay Verma, Anirban Rahut, Sandor S. Kalman | 2010-09-14 |
| 7735047 | Method for technology mapping considering boolean flexibility | Qiang Wang | 2010-06-08 |
| 7725868 | Method and apparatus for facilitating signal routing within a programmable logic device | Vinay Verma, Anirban Rahut, Sudip K. Nag, Rajeev Jayaraman | 2010-05-25 |
| 7653891 | Method of reducing power of a circuit | Manoj Chirania, Subodh Gupta, Philip D. Costello | 2010-01-26 |
| 7618533 | Filter system for an automobile engine | Cristy Anderson | 2009-11-17 |
| 7603646 | Method and apparatus for power optimization using don't care conditions of configuration bits in lookup tables | Tetse Jang, Kevin Kwong-Tai Chung, Qiang Wang, Subodh Gupta | 2009-10-13 |
| 7555734 | Processing constraints in computer-aided design for integrated circuits | Qiang Wang, Rajat Aggarwal | 2009-06-30 |
| 7398496 | Unified placer infrastructure | James L. Saunders, Krishnan Anandh, Guenther Stenz, Sudip K. Nag | 2008-07-08 |
| 7306977 | Method and apparatus for facilitating signal routing within a programmable logic device | Vinay Verma, Anirban Rahut, Sudip K. Nag, Rajeev Jayaraman | 2007-12-11 |