Manoj Chirania — 18 Patents at AMD

Manoj Chirania has been granted 18 US patents while listed as an inventor at AMD. The first was granted in 2006 and the most recent in September 2010. Manoj Chirania ranks #245,716 of 4,157,543 US inventors in our database (top 5.9%). Patent records list Manoj Chirania in Palo Alto, CA, US.

Patents per Year

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
7804719	Programmable logic block having reduced output delay during RAM write processes when programmed to function in RAM mode	Venu M. Kondapalli	2010-09-28	$11,885,000
7653891	Method of reducing power of a circuit	Jason H. Anderson, Subodh Gupta, Philip D. Costello	2010-01-26	$4,137,000
7600204	Method for simulation of negative bias and temperature instability	Philip D. Costello, Robert Fu	2009-10-06	$6,100,000
7552410	Estimating LUT power usage	—	2009-06-23	$5,693,000
7518394	Process monitor vehicle	Philip D. Costello	2009-04-14	$6,987,000
7471104	Lookup table with relatively balanced delays	—	2008-12-30	$9,651,000
7423452	Integrated circuit including a multiplexer circuit	—	2008-09-09	$8,560,000
7385416	Circuits and methods of implementing flip-flops in dual-output lookup tables	Martin L. Voogel	2008-06-10	$9,162,000
7382157	Interconnect driver circuits for dynamic logic	Steven P. Young, Ramakrishna K. Tanikella, Venu M. Kondapalli	2008-06-03	$12,611,000
7378869	Lookup table circuits programmable to implement flip-flops	Martin L. Voogel	2008-05-27	$3,924,000
7375552	Programmable logic block with dedicated and selectable lookup table outputs coupled to general interconnect structure	Steven P. Young, Trevor J. Bauer, Venu M. Kondapalli	2008-05-20	$3,880,000
7268587	Programmable logic block with carry chains providing lookahead functions of different lengths	Tien Duc Pham, Venu M. Kondapalli, Steven P. Young	2007-09-11	$6,656,000
7265576	Programmable lookup table with dual input and output terminals in RAM mode	Venu M. Kondapalli, Trevor J. Bauer, Philip D. Costello, Steven P. Young	2007-09-04	$4,969,000
7215138	Programmable lookup table with dual input and output terminals in shift register mode	Venu M. Kondapalli, Trevor J. Bauer, Philip D. Costello, Steven P. Young	2007-05-08	$9,696,000
7202697	Programmable logic block having improved performance when functioning in shift register mode	Venu M. Kondapalli	2007-04-10	$16,646,000
7119570	Method of measuring performance of a semiconductor device and circuit for the same	Venu M. Kondapalli, Martin L. Voogel, Philip D. Costello	2006-10-10	$33,455,000
7116131	High performance programmable logic devices utilizing dynamic circuitry	Venu M. Kondapalli	2006-10-03	$7,381,000
6998872	Lookup table circuit optionally configurable as two or more smaller lookup tables with independent inputs	Venu M. Kondapalli	2006-02-14	$31,612,000

Manoj Chirania — 18 Patents

Patents per Year

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