Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Programmable logic block having improved performance when functioning in shift register mode

Programmable logic block having improved performance when functioning in shift register mode

US Patent 7202697 · Granted Apr 10, 2007

Estimated economic value: $16,646,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Circuits and methods for detecting decreases in a supply voltage in an integrate2025
Programmable logic block having reduced output delay during RAM write processes 2010
Programmable logic block having reduced output delay during RAM write processes 2010
Method of reducing power of a circuit2010
Method for simulation of negative bias and temperature instability2009
Estimating LUT power usage2009
Process monitor vehicle2009
Apparatus and method for reconfiguring a programmable logic device2009
Lookup table with relatively balanced delays2008
Circuit for and method of generating a delay in an input/output port of an integ2008
Method and apparatus for a programmable level translator2008
Integrated circuit including a multiplexer circuit2008