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USPTO Patent Rankings Data through Dec 31, 2025
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Scott O. Frake — 16 Patents

AMD: 15 patents #779 of 9,280Top 9%
NSNational Semiconductor: 1 patents #1,247 of 2,238Top 60%
Santa Clara, CA: #1,055 of 9,301 inventorsTop 15%
California: #37,952 of 386,348 inventorsTop 10%
Overall (All Time): #284,196 of 4,157,543Top 7%
16 Patents All Time
Scott O. Frake has been granted 16 US patents while listed as an inventor at AMD. The first was granted in 1990 and the most recent in May 2003. Scott O. Frake ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list Scott O. Frake in Santa Clara, CA, US.

Patents per Year

Patents granted per year, 1990 to 2003Bar chart with a peak of 3 patents in 1999.peak 31990: 1 patents19901992: 1 patents19921998: 1 patents19981999: 3 patents19992000: 2 patents20002001: 3 patents20012002: 3 patents20022003: 2 patents2003

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
6559715 Low pass filter Jason R. Bergendahl 2003-05-06 $67,720,000
6526466 Method and system for PLD swapping James McManus, David P. Schultz, Wilson K. Yee 2003-02-25 $13,505,000
6448809 FPGA with a plurality of input reference voltage levels F. Erich Goetting, Venu M. Kondapalli, Steven P. Young 2002-09-10 $24,871,000
6441641 Programmable logic device with partial battery backup Raymond C. Pang, Venu M. Kondapalli, Jane W. Sowards, Jennifer Wong, F. Erich Goetting +2 more 2002-08-27 $53,701,000
6366117 Nonvolatile/battery-backed key in PLD Raymond C. Pang, Jennifer Wong, Jane W. Sowards, Venu M. Kondapalli, F. Erich Goetting +2 more 2002-04-02 $73,316,000
6294930 FPGA with a plurality of input reference voltage levels F. Erich Goetting, Venu M. Kondapalli, Steven P. Young 2001-09-25 $147,768,000
6204691 FPGA with a plurality of input reference voltage levels grouped into sets F. Erich Goetting, Venu M. Kondapalli, Steven P. Young 2001-03-20 $36,747,000
6204695 Clock-gating circuit for reducing power consumption Peter H. Alfke, Alvin Y. Ching, Jennifer Wong, Steven P. Young 2001-03-20 $36,747,000
6049227 FPGA with a plurality of I/O voltage levels F. Erich Goetting, Venu M. Kondapalli, Steven P. Young 2000-04-11 $177,812,000
6034557 Delay circuit with temperature and voltage stability David P. Schultz 2000-03-07 $78,327,000
5958026 Input/output buffer supporting multiple I/O standards F. Erich Goetting, Venu M. Kondapalli 1999-09-28 $36,363,000
5912937 CMOS flip-flop having non-volatile storage F. Erich Goetting 1999-06-15 $121,822,000
5877632 FPGA with a plurality of I/O voltage levels F. Erich Goetting, Venu M. Kondapalli, Steven P. Young 1999-03-02 $32,123,000
5764564 Write-assisted memory cell and method of operating same Philip D. Costello 1998-06-09 $11,764,000
5166858 Capacitor formed in three conductive layers Roger David Carpenter 1992-11-24 $6,625,000
4959565 Output buffer with ground bounce control Mark Knecht 1990-09-25 $4,340,000