SF

Scott O. Frake

AM AMD: 15 patents #735 of 9,279Top 8%
NS National Semiconductor: 1 patents #1,247 of 2,238Top 60%
Overall (All Time): #302,329 of 4,157,543Top 8%
16
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6559715 Low pass filter Jason R. Bergendahl 2003-05-06
6526466 Method and system for PLD swapping James McManus, David P. Schultz, Wilson K. Yee 2003-02-25
6448809 FPGA with a plurality of input reference voltage levels F. Erich Goetting, Venu M. Kondapalli, Steven P. Young 2002-09-10
6441641 Programmable logic device with partial battery backup Raymond C. Pang, Venu M. Kondapalli, Jane W. Sowards, Jennifer Wong, F. Erich Goetting +2 more 2002-08-27
6366117 Nonvolatile/battery-backed key in PLD Raymond C. Pang, Jennifer Wong, Jane W. Sowards, Venu M. Kondapalli, F. Erich Goetting +2 more 2002-04-02
6294930 FPGA with a plurality of input reference voltage levels F. Erich Goetting, Venu M. Kondapalli, Steven P. Young 2001-09-25
6204695 Clock-gating circuit for reducing power consumption Peter H. Alfke, Alvin Y. Ching, Jennifer Wong, Steven P. Young 2001-03-20
6204691 FPGA with a plurality of input reference voltage levels grouped into sets F. Erich Goetting, Venu M. Kondapalli, Steven P. Young 2001-03-20
6049227 FPGA with a plurality of I/O voltage levels F. Erich Goetting, Venu M. Kondapalli, Steven P. Young 2000-04-11
6034557 Delay circuit with temperature and voltage stability David P. Schultz 2000-03-07
5958026 Input/output buffer supporting multiple I/O standards F. Erich Goetting, Venu M. Kondapalli 1999-09-28
5912937 CMOS flip-flop having non-volatile storage F. Erich Goetting 1999-06-15
5877632 FPGA with a plurality of I/O voltage levels F. Erich Goetting, Venu M. Kondapalli, Steven P. Young 1999-03-02
5764564 Write-assisted memory cell and method of operating same Philip D. Costello 1998-06-09
5166858 Capacitor formed in three conductive layers Roger David Carpenter 1992-11-24
4959565 Output buffer with ground bounce control Mark Knecht 1990-09-25