Issued Patents All Time
Showing 25 most recent of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8601351 | BCH decoding with multiple sigma polynomial calculation algorithms | Chun Fung Man | 2013-12-03 |
| 8495122 | Programmable device with dynamic DSP architecture | James M. Simkins, Steven P. Young, Bernard J. New, Alvin Y. Ching | 2013-07-23 |
| 7882165 | Digital signal processing element having an arithmetic logic unit | James M. Simkins, Bernard J. New, Alvin Y. Ching, John M. Thendean, Anna Wing Wah Wong +2 more | 2011-02-01 |
| 7870182 | Digital signal processing circuit having an adder circuit with carry-outs | John M. Thendean, Bernard J. New, Alvin Y. Ching, James M. Simkins, Anna Wing Wah Wong +1 more | 2011-01-11 |
| 7865542 | Digital signal processing block having a wide multiplexer | Bernard J. New, Vasisht Mantra Vadi, Alvin Y. Ching, John M. Thendean, Anna Wing Wah Wong +1 more | 2011-01-04 |
| 7860915 | Digital signal processing circuit having a pattern circuit for determining termination conditions | Vasisht Mantra Vadi, Bernard J. New, Alvin Y. Ching, John M. Thendean, Anna Wing Wah Wong +1 more | 2010-12-28 |
| 7853636 | Digital signal processing circuit having a pattern detector circuit for convergent rounding | Bernard J. New, James M. Simkins, Alvin Y. Ching, John M. Thendean, Anna Wing Wah Wong +1 more | 2010-12-14 |
| 7853632 | Architectural floorplan for a digital signal processing circuit | Alvin Y. Ching, Bernard J. New, James M. Simkins, John M. Thendean, Anna Wing Wah Wong +1 more | 2010-12-14 |
| 7853634 | Digital signal processing circuit having a SIMD circuit | James M. Simkins, Bernard J. New, Alvin Y. Ching, John M. Thendean, Anna Wing Wah Wong +1 more | 2010-12-14 |
| 7849119 | Digital signal processing circuit having a pattern detector circuit | Vasisht Mantra Vadi, Bernard J. New, Alvin Y. Ching, John M. Thendean, Anna Wing Wah Wong +1 more | 2010-12-07 |
| 7844653 | Digital signal processing circuit having a pre-adder circuit | James M. Simkins, John M. Thendean, Vasisht Mantra Vadi, Bernard J. New, Anna Wing Wah Wong +1 more | 2010-11-30 |
| 7840627 | Digital signal processing circuit having input register blocks | James M. Simkins, Bernard J. New, Alvin Y. Ching, John M. Thendean, Anna Wing Wah Wong +1 more | 2010-11-23 |
| 7840630 | Arithmetic logic unit circuit | Anna Wing Wah Wong, Bernard J. New, Alvin Y. Ching, John M. Thendean, James M. Simkins +2 more | 2010-11-23 |
| 7567997 | Applications of cascading DSP slices | James M. Simkins, Steven P. Young, Bernard J. New, Alvin Y. Ching | 2009-07-28 |
| 7480690 | Arithmetic circuit with multiplexed addend inputs | James M. Simkins, Steven P. Young, Bernard J. New, Alvin Y. Ching | 2009-01-20 |
| 7472155 | Programmable logic device with cascading DSP slices | James M. Simkins, Steven P. Young, Bernard J. New, Alvin Y. Ching | 2008-12-30 |
| 7467175 | Programmable logic device with pipelined DSP slices | James M. Simkins, Steven P. Young, Bernard J. New, Alvin Y. Ching | 2008-12-16 |
| 7467177 | Mathematical circuit with dynamic rounding | James M. Simkins, Steven P. Young, Bernard J. New, Alvin Y. Ching | 2008-12-16 |
| 7417918 | Method and apparatus for configuring the operating speed of a programmable logic device through a self-timed reference circuit | Eunice Y. D. Hao, Tony Ngai, Alvin Y. Ching | 2008-08-26 |
| 7314174 | Method and system for configuring an integrated circuit | Vasisht Mantra Vadi, David P. Schultz, Steven P. Young | 2008-01-01 |
| 7286382 | Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability | Vasisht Mantra Vadi, David P. Schultz, Steven P. Young | 2007-10-23 |
| 7216277 | Self-repairing redundancy for memory blocks in programmable logic devices | Tony Ngai, Wayson J. Lowe | 2007-05-08 |
| 7181718 | Structures and methods providing columns of tightly coupled processor and RAM blocks within an array of logic blocks | Goran Bilski, Ralph D. Wittig, David B. Squires | 2007-02-20 |
| 7142442 | Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability | Vasisht Mantra Vadi, David P. Schultz, Steven P. Young | 2006-11-28 |
| 7117372 | Programmable logic device with decryption and structure for preventing design relocation | Stephen M. Trimberger, Raymond C. Pang, Walter N. Sze | 2006-10-03 |