Goran Bilski — 15 Patents at AMD

Goran Bilski has been granted 15 US patents while listed as an inventor at AMD. The first was granted in 2002 and the most recent in September 2022. Goran Bilski ranks #307,048 of 4,157,543 US inventors in our database (top 7.4%). Patent records list Goran Bilski in San Jose, CA, US.

Issued Patents All Time

Showing 1–15 of 15 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
11443091	Data processing engines with cascade connected cores	Peter McColgan, Baris Ozgul, David Clarke, Tim Tuan, Juan J. Noguera Serra +4 more	2022-09-13
7676661	Method and system for function acceleration using custom instructions	Sundararajarao Mohan, Satish R. Ganesan	2010-03-09	$43,883,000
7490227	Method and system to recreate instruction and data traces in an embedded processor	Jorge Ernesto Carrillo, Usha Prabhu, Navaneethan Sundaramoorthy	2009-02-10	$6,705,000
7426583	Method and circuit for decoding an address of an address space	Paulo L. Dutra, Jorge Ernesto Carrillo	2008-09-16	$6,646,000
7380106	Method and system for transferring data between a register in a processor and a point-to-point communication link	—	2008-05-27	$3,924,000
7340585	Method and system for fast linked processor in a system on a chip (SoC)	Satish R. Ganesan, Usha Prabhu, Ralph D. Wittig	2008-03-04	$13,352,000
7243312	Method and apparatus for power optimization during an integrated circuit design process	Patrick Lysaght, Tim Tuan	2007-07-10	$7,405,000
7181718	Structures and methods providing columns of tightly coupled processor and RAM blocks within an array of logic blocks	Ralph D. Wittig, Jennifer Wong, David B. Squires	2007-02-20	$15,043,000
7131091	Generating fast logic simulation models for a PLD design description	Satish R. Ganesan, Usha Prabhu, Paulo L. Dutra	2006-10-31	$11,476,000
6946874	Structures and methods providing columns of tightly coupled processor and RAM blocks within an array of logic blocks	Ralph D. Wittig, Jennifer Wong, David B. Squires	2005-09-20	$11,409,000
6803786	Structures and methods providing columns of tightly coupled processor and RAM blocks within an array of logic blocks	Ralph D. Wittig, Jennifer Wong, David B. Squires	2004-10-12	$73,525,000
6703862	Efficient loadable registers in programmable logic devices	—	2004-03-09	$54,043,000
6617876	Structures and methods for distributing high-fanout signals in FPGAs using carry multiplexers	—	2003-09-09	$21,199,000
6476634	ALU implementation in single PLD logic cell	—	2002-11-05	$32,960,000
6477699	Electronic circuit designs adaptable for applications having different binary data formats	—	2002-11-05	$32,960,000

Goran Bilski — 15 Patents

Issued Patents All Time

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