Issued Patents All Time
Showing 26–47 of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7117373 | Bitstream for configuring a PLD with encrypted design data | Stephen M. Trimberger, Raymond C. Pang, Walter N. Sze, Kameswara K. Rao | 2006-10-03 |
| 7038519 | Digital clock manager having cascade voltage switch logic clock paths | Raymond C. Pang | 2006-05-02 |
| 6981153 | Programmable logic device with method of preventing readback | Raymond C. Pang, Walter N. Sze, John M. Thendean, Stephen M. Trimberger | 2005-12-27 |
| 6957340 | Encryption key for multi-key encryption in programmable logic device | Raymond C. Pang, Stephen M. Trimberger | 2005-10-18 |
| 6946874 | Structures and methods providing columns of tightly coupled processor and RAM blocks within an array of logic blocks | Goran Bilski, Ralph D. Wittig, David B. Squires | 2005-09-20 |
| 6931543 | Programmable logic device with decryption algorithm and decryption key | Raymond C. Pang, Walter N. Sze, Stephen M. Trimberger, John M. Thendean, Kameswara K. Rao | 2005-08-16 |
| 6803786 | Structures and methods providing columns of tightly coupled processor and RAM blocks within an array of logic blocks | Goran Bilski, Ralph D. Wittig, David B. Squires | 2004-10-12 |
| 6480954 | Method of time multiplexing a programmable logic device | Stephen M. Trimberger, Richard A. Carberry, Robert Anders Johnson | 2002-11-12 |
| 6441641 | Programmable logic device with partial battery backup | Raymond C. Pang, Venu M. Kondapalli, Jane W. Sowards, Scott O. Frake, F. Erich Goetting +2 more | 2002-08-27 |
| 6366117 | Nonvolatile/battery-backed key in PLD | Raymond C. Pang, Scott O. Frake, Jane W. Sowards, Venu M. Kondapalli, F. Erich Goetting +2 more | 2002-04-02 |
| 6353341 | Method and apparatus for discriminating against signal interference | Austin H. Lesea, Peter H. Alfke, Steven P. Young | 2002-03-05 |
| 6263430 | Method of time multiplexing a programmable logic device | Stephen M. Trimberger, Richard A. Carberry, Robert Anders Johnson | 2001-07-17 |
| 6204695 | Clock-gating circuit for reducing power consumption | Peter H. Alfke, Alvin Y. Ching, Scott O. Frake, Steven P. Young | 2001-03-20 |
| 5978260 | Method of time multiplexing a programmable logic device | Stephen M. Trimberger, Richard A. Carberry, Robert Anders Johnson | 1999-11-02 |
| 5959881 | Programmable logic device including configuration data or user data memory slices | Stephen M. Trimberger, Richard A. Carberry, Robert Anders Johnson | 1999-09-28 |
| 5933025 | Low voltage interface circuit with a high voltage tolerance | Scott S. Nance, Mohammad Tamjidi, Richard C. Li, Hassan K. Bazargan | 1999-08-03 |
| 5784313 | Programmable logic device including configuration data or user data memory slices | Stephen M. Trimberger, Richard A. Carberry, Robert Anders Johnson | 1998-07-21 |
| 5778439 | Programmable logic device with hierarchical confiquration and state storage | Stephen M. Trimberger, Richard A. Carberry, Robert Anders Johnson | 1998-07-07 |
| 5646545 | Time multiplexed programmable logic device | Stephen M. Trimberger, Richard A. Carberry, Robert Anders Johnson | 1997-07-08 |
| 5629637 | Method of time multiplexing a programmable logic device | Stephen M. Trimberger, Richard A. Carberry, Robert Anders Johnson | 1997-05-13 |
| 5600263 | Configuration modes for a time multiplexed programmable logic device | Stephen M. Trimberger, Richard A. Carberry, Robert Anders Johnson | 1997-02-04 |
| 5583450 | Sequencer for a time multiplexed programmable logic device | Stephen M. Trimberger, Richard A. Carberry, Robert Anders Johnson | 1996-12-10 |