KR

Kameswara K. Rao

AM AMD: 30 patents #316 of 9,279Top 4%
MO Mosys: 2 patents #22 of 45Top 50%
SI Signetics: 2 patents #22 of 93Top 25%
CS Catalyst Semiconductor: 1 patents #21 of 41Top 55%
IN Intel: 1 patents #18,218 of 30,777Top 60%
Overall (All Time): #87,031 of 4,157,543Top 3%
38
Patents All Time

Issued Patents All Time

Showing 25 most recent of 38 patents

Patent #TitleCo-InventorsDate
8161355 Automatic refresh for improving data retention and endurance characteristics of an embedded non-volatile memory in a standard CMOS logic process Stephen Fung, Vithal Rao, Da-Guang Yu, J. Eric Ruetz, Chee Tee Chua +1 more 2012-04-17
8099691 Disabling unused/inactive resources in an integrated circuit for static power reduction Tim Tuan, Robert O. Conn 2012-01-17
8081521 Two bits per cell non-volatile memory architecture Chee Tee Chua, Vithal Rao, Jawji Chen, Da-Guang Yu, J. Eric Ruetz +1 more 2011-12-20
7581124 Method and mechanism for controlling power consumption of an integrated circuit Neil G. Jacobson, Matthew T. Murphy, Tim Tuan, Robert O. Conn 2009-08-25
7562332 Disabling unused/inactive resources in programmable logic devices for static power reduction Tim Tuan, Robert O. Conn 2009-07-14
7549139 Tuning programmable logic devices for low-power design implementation Tim Tuan, Jan L. deJong, Robert O. Conn 2009-06-16
7504854 Regulating unused/inactive resources in programmable logic devices for static power reduction Kevin T. Look, Michael J. Hart, Tim Tuan, Robert O. Conn 2009-03-17
7117373 Bitstream for configuring a PLD with encrypted design data Stephen M. Trimberger, Raymond C. Pang, Walter N. Sze, Jennifer Wong 2006-10-03
7098689 Disabling unused/inactive resources in programmable logic devices for static power reduction Tim Tuan, Robert O. Conn 2006-08-29
7046071 Series capacitor coupling multiplexer for programmable logic devices Robert O. Conn 2006-05-16
6931543 Programmable logic device with decryption algorithm and decryption key Raymond C. Pang, Walter N. Sze, Jennifer Wong, Stephen M. Trimberger, John M. Thendean 2005-08-16
6549458 Non-volatile memory array using gate breakdown structures Martin L. Voogel, James Karp, Shahin Toutounchi, Michael J. Hart, Daniel Gitlin +3 more 2003-04-15
6522582 Non-volatile memory array using gate breakdown structures Martin L. Voogel, James Karp, Shahin Toutounchi, Michael J. Hart, Daniel Gitlin +3 more 2003-02-18
6438065 Redundancy architecture and method for non-volatile storage Martin L. Voogel, Michael J. Hart 2002-08-20
6366117 Nonvolatile/battery-backed key in PLD Raymond C. Pang, Jennifer Wong, Scott O. Frake, Jane W. Sowards, Venu M. Kondapalli +2 more 2002-04-02
6265266 Method of forming a two transistor flash EPROM cell Anders T. Dejenfelt, George H. Simmons, Tomoyuki Furuhata 2001-07-24
6243294 Memory architecture for non-volatile storage using gate breakdown structure in standard sub 0.35 micron process Martin L. Voogel, Michael J. Hart 2001-06-05
6208549 One-time programmable poly-fuse circuit for implementing non-volatile functions in a standard sub 0.35 micron CMOS Martin L. Voogel 2001-03-27
6177830 High voltage charge pump using standard sub 0.35 micron CMOS process 2001-01-23
6055205 Decoder for a non-volatile memory array using gate breakdown structure in standard sub 0.35 micron CMOS process Martin L. Voogel 2000-04-25
6044012 Non-volatile memory array using gate breakdown structure in standard sub 0.35 micron CMOS process Martin L. Voogel, Shahin Toutounchi, James Karp 2000-03-28
5991880 Overridable data protection mechanism for PLDs Derek R. Curd, Neil G. Jacobson, Sholeh Diba, Napoleon W. Lee, Wei-Yi Ku 1999-11-23
5959885 Non-volatile memory array using single poly EEPROM in standard CMOS process 1999-09-28
5949712 Non-volatile memory array using gate breakdown structure Martin L. Voogel 1999-09-07
5949987 Efficient in-system programming structure and method for non-volatile programmable logic devices Derek R. Curd, Napoleon W. Lee 1999-09-07