Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7786749 | Programmable integrated circuit having built in test circuit | Tsung-Lu Syu | 2010-08-31 |
| 7460528 | Processing data packets at a storage service module of a switch | Joseph I. Chamdani, Litko Chan, Richard D. Reohr, Jr. | 2008-12-02 |
| 6754760 | Programmable interface for a configurable system bus | Brian Fox, Sridhar Krishnamurthy, Bart Reynolds, Steven Winegarden | 2004-06-22 |
| 6526466 | Method and system for PLD swapping | Scott O. Frake, James McManus, David P. Schultz | 2003-02-25 |
| 6459646 | Bank-based configuration and reconfiguration for programmable logic in a system on a chip | Fung Fung Lee, Edmond Y. Cheung | 2002-10-01 |
| 6218864 | Structure and method for generating a clock enable signal in a PLD | Steven P. Young, Jane W. Sowards | 2001-04-17 |
| 6094065 | Integrated circuit with field programmable and application specific logic areas | Danesh Tavana, Stephen M. Trimberger | 2000-07-25 |
| 5883525 | FPGA architecture with repeatable titles including routing matrices and logic matrices | Danesh Tavana, Victor A. Holen | 1999-03-16 |
| 5825202 | Integrated circuit with field programmable and application specific logic areas | Danesh Tavana, Stephen M. Trimberger | 1998-10-20 |
| 5682107 | FPGA architecture with repeatable tiles including routing matrices and logic matrices | Danesh Tavana, Victor A. Holen | 1997-10-28 |
| 5675589 | Programmable scan chain testing structure and method | — | 1997-10-07 |
| 5550843 | Programmable scan chain testing structure and method | — | 1996-08-27 |
| 5453706 | Field programmable gate array providing contention free configuration and reconfiguration | — | 1995-09-26 |