Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Bart Reynolds — 18 Patents

AMD: 14 patents #875 of 9,280Top 10%
TRTriscend: 4 patents #2 of 17Top 15%
Manzanita, OR: #1 of 3 inventorsTop 35%
Oregon: #2,430 of 28,073 inventorsTop 9%
Overall (All Time): #245,716 of 4,157,543Top 6%
18 Patents All Time
Bart Reynolds has been granted 18 US patents while listed as an inventor at AMD. The first was granted in 1995 and the most recent in November 2021. Bart Reynolds ranks #245,716 of 4,157,543 US inventors in our database (top 5.9%). Patent records list Bart Reynolds in Manzanita, OR, US.

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11176296 Unified data model for heterogeneous integrated circuit Pradip K. Jha, Brendan M. O'Higgins, Dinesh K. Monga, Ryan A. Linderman 2021-11-16 $110,062,000
10956638 Programmable integrated circuits for emulation Xiaojian Yang, Matthew H. Klein 2021-03-23 $85,314,000
10402521 Programmable integrated circuits for emulation Xiaojian Yang, Matthew H. Klein 2019-09-03 $30,588,000
10331837 Device graphics rendering for electronic designs Jennifer D. McEwen, Ian L. McEwen, Chong M. Lee 2019-06-25 $94,957,000
7584448 Constructing a model of a programmable logic device Keith R. Bean, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston 2009-09-01 $16,147,000
7536668 Determining networks of a tile module of a programmable logic device Keith R. Bean, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston 2009-05-19 $2,833,000
7472370 Comparing graphical and netlist connections of a programmable logic device Keith R. Bean, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston 2008-12-30 $9,651,000
7451424 Determining programmable connections through a switchbox of a programmable logic device Keith R. Bean, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston 2008-11-11 $3,775,000
7451425 Determining controlling pins for a tile module of a programmable logic device Keith R. Bean, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston 2008-11-11 $3,775,000
7451423 Determining indices of configuration memory cell modules of a programmable logic device Keith R. Bean, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston 2008-11-11 $3,775,000
7451420 Determining reachable pins of a network of a programmable logic device Keith R. Bean, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston 2008-11-11 $3,775,000
6910002 Method and apparatus for specifying addressability and bus connections in a logic design Cheng-I Chuang, Chukwuweta Chukwudebe, Sridhar Krishnamurthy, Damon McCormick, Tom Shui +1 more 2005-06-21 $32,351,000
6754760 Programmable interface for a configurable system bus Wilson K. Yee, Brian Fox, Sridhar Krishnamurthy, Steven Winegarden 2004-06-22 $14,473,000
6704850 Method and apparatus for determining the width of a memory subsystem 2004-03-09
6661812 Bidirectional bus for use as an interconnect routing resource Sridhar Krishnamurthy 2003-12-09
6658547 Method and apparatus for specifying address offsets and alignment in logic design Sridhar Krishnamurthy, Damon McCormick, Kai Zhu 2003-12-02
6467009 Configurable processor system unit Steven Winegarden, Brian Fox, Jean-Didier Allegrucci, Sridhar Krishnamurthy, Danesh Tavana +4 more 2002-10-15
5448493 Structure and method for manually controlling automatic configuration in an integrated circuit logic block array Todd J. Topolewski, Christine M. Weir, Julia M. Smuts, Pardner Wynn, Stephen M. Trimberger 1995-09-05 $16,586,000