Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Danesh Tavana — 11 Patents

AMD: 9 patents #1,399 of 9,280Top 20%
MMMonolithic Memories: 1 patents #17 of 45Top 40%
TRTriscend: 1 patents #11 of 17Top 65%
San Jose, CA: #5,902 of 32,062 inventorsTop 20%
California: #56,011 of 386,348 inventorsTop 15%
Overall (All Time): #435,149 of 4,157,543Top 15%
11 Patents All Time
Danesh Tavana has been granted 11 US patents while listed as an inventor at AMD. The first was granted in 1987 and the most recent in October 2002. Danesh Tavana ranks #435,149 of 4,157,543 US inventors in our database (top 10.5%). Patent records list Danesh Tavana in San Jose, CA, US.

Patents per Year

Patents granted per year, 1987 to 2002Bar chart with a peak of 2 patents in 1997.peak 21987: 1 patents19871988: 1 patents19881996: 1 patents19961997: 2 patents19971998: 2 patents19981999: 1 patents19992000: 1 patents20002001: 1 patents20012002: 1 patents2002

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
6467009 Configurable processor system unit Steven Winegarden, Bart Reynolds, Brian Fox, Jean-Didier Allegrucci, Sridhar Krishnamurthy +4 more 2002-10-15
6212639 Encryption of configuration stream Charles R. Erickson, Victor A. Holen 2001-04-03 $69,974,000
6094065 Integrated circuit with field programmable and application specific logic areas Wilson K. Yee, Stephen M. Trimberger 2000-07-25 $120,007,000
5883525 FPGA architecture with repeatable titles including routing matrices and logic matrices Wilson K. Yee, Victor A. Holen 1999-03-16 $76,659,000
5825202 Integrated circuit with field programmable and application specific logic areas Wilson K. Yee, Stephen M. Trimberger 1998-10-20 $14,707,000
5818255 Method and circuit for using a function generator of a programmable logic device to implement carry logic functions Bernard J. New 1998-10-06 $18,737,000
5682107 FPGA architecture with repeatable tiles including routing matrices and logic matrices Wilson K. Yee, Victor A. Holen 1997-10-28 $30,527,000
5635851 Read and writable data bus particularly for programmable logic devices 1997-06-03 $24,814,000
5504439 I/O interface cell for use with optional pad 1996-04-02 $39,762,000
4789951 Programmable array logic cell John Birkner, Andrew K. Chan, Sing Y. Wong 1988-12-06 $995,000
4698525 Buffered Miller current compensating circuit Sing Y. Wong 1987-10-06