Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10331837 | Device graphics rendering for electronic designs | Jennifer D. McEwen, Chong M. Lee, Bart Reynolds | 2019-06-25 |
| 9454630 | Graphical representation of integrated circuits | Chong M. Lee, David L. Kreymer | 2016-09-27 |
| 8752075 | Method for data transport | Chong M. Lee, David L. Kreymer | 2014-06-10 |
| 8418221 | Methods of prioritizing routing resources to generate and evaluate test designs in programmable logic devices | Jay T. Young | 2013-04-09 |
| 8117577 | Determining timing paths within a circuit block of a programmable integrated circuit | Vasisht Mantra Vadi, Alvin Y. Ching, Subodh Kumar, Richard D. Freeman, Philip R. Haratsaris +2 more | 2012-02-14 |
| 8104011 | Method of routing a design to increase the quality of the design | Prasanna Sundararajan, Carter Hamilton | 2012-01-24 |
| 8082535 | Method and apparatus for testing programmable integrated circuits | Teymour M. Mansour, Andrew G. Anderson, Reto Stamm | 2011-12-20 |
| 7949974 | Isolation verification within integrated circuits | Jason J. Moore, Reto Stamm, John D. Corbett, Eric M. Shiflet | 2011-05-24 |
| 7480842 | Method and apparatus for reducing the number of test designs for device testing | Jay T. Young, Reto Stamm | 2009-01-20 |
| 7367007 | Method of routing a design to increase the quality of the design | Prasanna Sundararajan, Carter Hamilton | 2008-04-29 |
| 7299430 | Reducing design execution run time bit stream size for device testing | Jay T. Young | 2007-11-20 |
| 7234120 | Fault isolation in a programmable logic device | Donald Audley Staab, Reto Stamm, Phoumra Tan | 2007-06-19 |
| 7149997 | Routing with frame awareness to minimize device programming time and test cost | Jay T. Young, Jeffrey V. Lindholm | 2006-12-12 |
| 7058919 | Methods of generating test designs for testing specific routing resources in programmable logic devices | Jay T. Young, Sridhar Krishnamurthy, Jeffrey V. Lindholm | 2006-06-06 |
| 6049224 | Programmable logic device with logic cells having a flexible input structure | Barry Britton, Ho T. Nguyen, Satwant Singh, Carolyn W. Spivak, Richard G. Stuby, Jr. | 2000-04-11 |