Issued Patents All Time
Showing 25 most recent of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11429595 | Persistence of write requests in a database proxy | Amarnath Vishwakarma, Syam Prasad, Murali Krishna, Ashutosh Sharma, Kuladeep Sai Reddy +3 more | 2022-08-30 |
| 11349922 | System and method for a database proxy | Chidamber R. Kulkarni, Amarnath Vishwakarma, Raushan Raj, Vijaya Raghava Chiyedu, Rahul Sachdev +2 more | 2022-05-31 |
| 11256515 | Techniques for accelerating compaction | Chidamber R. Kulkarni, Rahul Jain | 2022-02-22 |
| 11126600 | System and method to accelerate compaction | Chidamber R. Kulkarni | 2021-09-21 |
| 11044314 | System and method for a database proxy | Chidamber R. Kulkarni, Aditya Alurkar, Pradeep Kumar Mishra, Prasanna Sukumar, Vijaya Raghava +4 more | 2021-06-22 |
| 10931587 | Systems and methods for congestion control in a network | Chidamber R. Kulkarni | 2021-02-23 |
| 10237350 | System and method for a database proxy | Chidamber R. Kulkarni, Aditya Alurkar, Pradeep Kumar Mishra, Prasanna Sukumar, Vijaya Raghava +4 more | 2019-03-19 |
| 10049035 | Stream memory management unit (SMMU) | Chidamber R. Kulkarni | 2018-08-14 |
| 9378003 | Compiler directed cache coherence for many caches generated from high-level language source code | Andrew R. Putnam, Jeffrey M. Mason | 2016-06-28 |
| 9286221 | Heterogeneous memory system | Chidamber R. Kulkarni | 2016-03-15 |
| 9262325 | Heterogeneous memory system | Chidamber R. Kulkarni | 2016-02-16 |
| 9043557 | Heterogeneous memory system | Chidamber R. Kulkarni | 2015-05-26 |
| 8473880 | Synchronization of parallel memory accesses in a dataflow circuit | David W. Bennett | 2013-06-25 |
| 8473904 | Generation of cache architecture from a high-level language description | David W. Bennett, Robert Gwilym Dimond, Lauren B. Wenzl, Jeffrey M. Mason | 2013-06-25 |
| 8468510 | Optimization of cache architecture generated from a high-level language description | Andrew R. Putnam, David W. Bennett | 2013-06-18 |
| 8443344 | Methods for identifying gating opportunities from a high-level language program and generating a hardware definition | Tim Tuan | 2013-05-14 |
| 8104011 | Method of routing a design to increase the quality of the design | Carter Hamilton, Ian L. McEwen | 2012-01-24 |
| 7971072 | Secure exchange of IP cores | Adam P. Donlin, Bernard J. New | 2011-06-28 |
| 7930662 | Methods for automatically generating fault mitigation strategies for electronic system designs | John D. Corbett, David W. Bennett, Jeffrey M. Mason | 2011-04-19 |
| 7852107 | Single event upset mitigation | — | 2010-12-14 |
| 7813912 | Profiling a hardware system generated by compiling a high level language onto a programmable logic device | — | 2010-10-12 |
| 7788502 | Method and system for secure exchange of IP cores | Adam P. Donlin, Bernard J. New | 2010-08-31 |
| 7764081 | Programmable logic device (PLD) with memory refresh based on single event upset (SEU) occurrence to maintain soft error immunity | Tim Tuan | 2010-07-27 |
| 7689726 | Bootable integrated circuit device for readback encoding of configuration data | Brandon J. Blodget, Scott P. McMillan, Philip B. James-Roxby, Eric R. Keller | 2010-03-30 |
| 7539914 | Method of refreshing configuration data in an integrated circuit | Jorn W. Janneck | 2009-05-26 |