Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Jeffrey M. Mason — 13 Patents

AMD: 11 patents #1,202 of 9,280Top 15%
ISIonu Security: 2 patents #4 of 5Top 80%
Lake Forest, CA: #141 of 1,030 inventorsTop 15%
California: #47,433 of 386,348 inventorsTop 15%
Overall (All Time): #362,438 of 4,157,543Top 9%
13 Patents All Time
Jeffrey M. Mason has been granted 13 US patents while listed as an inventor at AMD. The first was granted in 2004 and the most recent in June 2016. Jeffrey M. Mason ranks #362,438 of 4,157,543 US inventors in our database (top 8.7%). Patent records list Jeffrey M. Mason in Lake Forest, CA, US.

Patents per Year

Patents granted per year, 2004 to 2016Bar chart with a peak of 3 patents in 2009.peak 32004: 1 patents20042006: 1 patents20062009: 3 patents20092010: 1 patents20102011: 3 patents20112013: 1 patents20132014: 2 patents20142016: 1 patents2016

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9378003 Compiler directed cache coherence for many caches generated from high-level language source code Prasanna Sundararajan, Andrew R. Putnam 2016-06-28 $4,436,000
8868833 Processor and cache arrangement with selective caching between first-level and second-level caches David W. Bennett 2014-10-21
8839004 Secure cloud computing infrastructure David W. Bennett 2014-09-16
8473904 Generation of cache architecture from a high-level language description Prasanna Sundararajan, David W. Bennett, Robert Gwilym Dimond, Lauren B. Wenzl 2013-06-25 $3,352,000
7930662 Methods for automatically generating fault mitigation strategies for electronic system designs Prasanna Sundararajan, John D. Corbett, David W. Bennett 2011-04-19 $8,358,000
7917567 Floating-point processing unit for successive floating-point operations David W. Bennett 2011-03-29 $10,322,000
7890917 Method and apparatus for providing secure intellectual property cores for a programmable logic device Jay T. Young 2011-02-15 $6,885,000
7817655 Determining sizes of FIFO buffers between functional blocks in an electronic circuit David W. Bennett 2010-10-19 $10,447,000
7619442 Versatile bus interface macro for dynamically reconfigurable designs W. Story Leavesley, III 2009-11-17 $2,669,000
7600210 Method and apparatus for modular circuit design for a programmable logic device Jay T. Young 2009-10-06 $6,100,000
7478357 Versatile bus interface macro for dynamically reconfigurable designs W. Story Leavesley, III 2009-01-13 $4,868,000
7086029 Incremental design using a group area designation Arne S. Barras, Kate L. Kelley 2006-08-01 $4,184,000
6817005 Modular design method and system for programmable logic devices Steve E. Lass, Bruce E. Talley, David W. Bennett 2004-11-09 $16,507,000