Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11593138 | Server offload card with SoC and FPGA | Derek Chiou, Daniel Firestone, Jack Lavier | 2023-02-28 |
| 11010198 | Data processing system having a hardware acceleration plane and a software plane | Douglas C. Burger, Stephen F. Heil | 2021-05-18 |
| 10977104 | Partially reconfiguring acceleration components | Derek Chiou, Sitaram V. Lanka, Adrian M. Caulfield, Douglas C. Burger | 2021-04-13 |
| 10949379 | Network traffic routing in distributed computing systems | Sambhrama Madhusudhan Mundkur, Fengfen Liu, Norman Lam, Somesh Chaturmohta, Daniel Firestone +1 more | 2021-03-16 |
| 10819657 | Allocating acceleration component functionality for supporting services | Douglas C. Burger, Stephen F. Heil, Michael David Haselman, Sitaram V. Lanka, Yi Xiao | 2020-10-27 |
| 10789199 | Network traffic rate limiting in computing systems | Sambhrama Madhusudhan Mundkur, Fengfen Liu, Norman Lam, Somesh Chaturmohta, Daniel Firestone | 2020-09-29 |
| 10614028 | Network traffic routing in distributed computing systems | Sambhrama Madhusudhan Mundkur, Fengfen Liu, Norman Lam, Somesh Chaturmohta, Daniel Firestone | 2020-04-07 |
| 10606651 | Free form expression accelerator with thread length-based thread assignment to clustered soft processor cores that share a functional circuit | Douglas C. Burger, Stephen F. Heil, Sitaram V. Lanka, Aaron L. Smith | 2020-03-31 |
| 10540588 | Deep neural network processing on hardware accelerators with stacked memory | Douglas C. Burger, Derek Chiou, Eric S. Chung | 2020-01-21 |
| 10528119 | Dynamic power routing to hardware accelerators | Douglas C. Burger, Stephen F. Heil, Eric S. Chung, Adrian M. Caulfield | 2020-01-07 |
| 10511478 | Changing between different roles at acceleration components | Douglas C. Burger, Michael David Haselman, Stephen F. Heil, Yi Xiao, Sitaram V. Lanka | 2019-12-17 |
| 10452995 | Machine learning classification on hardware accelerators with stacked memory | Douglas C. Burger, Derek Chiou, Eric S. Chung | 2019-10-22 |
| 10332008 | Parallel decision tree processor architecture | Douglas C. Burger, James R. Larus, Jan Gray | 2019-06-25 |
| 10296392 | Implementing a multi-component service using plural hardware acceleration components | Stephen F. Heil, Adrian M. Caulfield, Douglas C. Burger, Eric S. Chung | 2019-05-21 |
| 10270709 | Allocating acceleration component functionality for supporting services | Douglas C. Burger, Stephen F. Heil, Michael David Haselman, Sitaram V. Lanka, Yi Xiao | 2019-04-23 |
| 10216555 | Partially reconfiguring acceleration components | Derek Chiou, Sitaram V. Lanka, Adrian M. Caulfield, Douglas C. Burger | 2019-02-26 |
| 10027543 | Reconfiguring an acceleration component among interconnected acceleration components | Sitaram V. Lanka, Adrian M. Caulfield, Eric S. Chung, Douglas C. Burger, Derek Chiou | 2018-07-17 |
| 9983938 | Locally restoring functionality at acceleration components | Stephen F. Heil, Sitaram V. Lanka, Adrian M. Caulfield, Eric S. Chung, Douglas C. Burger +1 more | 2018-05-29 |
| 9792154 | Data processing system having a hardware acceleration plane and a software plane | Douglas C. Burger, Stephen F. Heil | 2017-10-17 |
| 9760159 | Dynamic power routing to hardware accelerators | Douglas C. Burger, Stephen F. Heil, Eric S. Chung, Adrian M. Caulfield | 2017-09-12 |
| 9652327 | Restoring service acceleration | Stephen F. Heil, Sitaram V. Lanka, Adrian M. Caulfield, Eric S. Chung, Douglas C. Burger +1 more | 2017-05-16 |
| 9606836 | Independently networkable hardware accelerators for increased workflow optimization | Douglas C. Burger, Adrian M. Caulfield, Eric S. Chung | 2017-03-28 |
| 9378003 | Compiler directed cache coherence for many caches generated from high-level language source code | Prasanna Sundararajan, Jeffrey M. Mason | 2016-06-28 |
| 8468510 | Optimization of cache architecture generated from a high-level language description | Prasanna Sundararajan, David W. Bennett | 2013-06-18 |