Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8001511 | Methods of implementing and modeling interconnect lines at optional boundaries in multi-product programmable IC dies | Trevor J. Bauer, Jeffrey V. Lindholm, F. Erich Goetting, Ramakrishna K. Tanikella, Steven P. Young | 2011-08-16 |
| 7498192 | Methods of providing a family of related integrated circuits of different sizes | F. Erich Goetting, Trevor J. Bauer, Patrick J. McGuire, Paul Ying-Fung Wu, Steven P. Young | 2009-03-03 |
| 7491576 | Yield-enhancing methods of providing a family of scaled integrated circuits | Steven P. Young, Trevor J. Bauer, F. Erich Goetting, P. Hugo Lamarche, Patrick J. McGuire +3 more | 2009-02-17 |
| 7451421 | Methods of implementing and modeling interconnect lines at optional boundaries in multi-product programmable IC dies | Trevor J. Bauer, Jeffrey V. Lindholm, F. Erich Goetting, Ramakrishna K. Tanikella, Steven P. Young | 2008-11-11 |
| 7402443 | Methods of providing families of integrated circuits with similar dies partially disabled using product selection codes | Raymond C. Pang, Trevor J. Bauer, F. Erich Goetting, Steven P. Young | 2008-07-22 |
| 7345507 | Multi-product die configurable as two or more programmable integrated circuits of different logic capacities | Steven P. Young, Trevor J. Bauer, F. Erich Goetting, P. Hugo Lamarche, Patrick J. McGuire +3 more | 2008-03-18 |
| 6817005 | Modular design method and system for programmable logic devices | Jeffrey M. Mason, Steve E. Lass, David W. Bennett | 2004-11-09 |