Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Methods of implementing and modeling interconnect lines at optional boundaries in multi-product programmable IC dies

Methods of implementing and modeling interconnect lines at optional boundaries in multi-product programmable IC dies

US Patent 8001511 · Granted Aug 16, 2011

Estimated economic value: $5,707,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Systems and methods for the analysis of moving objects2025
Systems and methods for the analysis of moving objects2023
Compute dataflow architecture2023
Compute dataflow architecture2022
Systems and methods for the analysis of moving objects2022
Power delivery network for active-on-active stacked integrated circuits2022
Multi-chip stacked devices2022
Programmable termination circuits for programmable devices2021
Integrating rows of input/output blocks with memory controllers in a columnar pr2021
Redundancy scheme for multi-chip stacked devices2020
Circuit for and method of transmitting a signal in an integrated circuit device2020
Regularity of fabrics in programmable logic devices2020