EK

Eric R. Keller

AM AMD: 28 patents #342 of 9,279Top 4%
UP University of Pennsylvania: 2 patents #743 of 2,719Top 30%
AT AT&T: 1 patents #10,626 of 18,772Top 60%
UC University of Colorado: 1 patents #288 of 930Top 35%
Overall (All Time): #112,655 of 4,157,543Top 3%
32
Patents All Time

Issued Patents All Time

Showing 25 most recent of 32 patents

Patent #TitleCo-InventorsDate
11429407 Apparatus, method, and system to dynamically deploy wireless infrastructure Jonathan M. Smith, Thomas W. Rondeau, Kyle B. Super 2022-08-30
10425348 Stateless network functions Blake Caldwell, Murad Kablan 2019-09-24
10223139 Dynamically deployable wireless infrastructure in cloud environment Jonathan M. Smith, Thomas W. Rondeau, Kyle B. Super 2019-03-05
8806032 Methods and apparatus to migrate border gateway protocol sessions between routers Jacobus Van der Merwe, Jennifer Lynn Rexford 2014-08-12
8284772 Method for scheduling a network packet processor Philip B. James-Roxby 2012-10-09
8065130 Method for message processing on a programmable logic device Gordon J. Brebner, Philip B. James-Roxby, Chidamber R. Kulkarni 2011-11-22
8032874 Generation of executable threads having source code specifications that describe network packets Philip B. James-Roxby 2011-10-04
7990867 Pipeline for processing network packets Philip B. James-Roxby 2011-08-02
7823162 Thread circuits and a broadcast channel in programmable logic Philip B. James-Roxby 2010-10-26
7792117 Method for simulating a processor of network packets Philip B. James-Roxby, Graham F. Schelle 2010-09-07
7788402 Circuit for modification of a network packet by insertion or removal of a data segment Graham F. Schelle, Philip B. James-Roxby 2010-08-31
7784014 Generation of a specification of a network packet processor Gordon J. Brebner, Christopher E. Neely, Philip B. James-Roxby, Chidamber R. Kulkarni, Michael A. Baxter +2 more 2010-08-24
7770179 Method and apparatus for multithreading on a programmable logic device Philip B. James-Roxby, Gordon J. Brebner, Chidamber R. Kulkarni 2010-08-03
7698449 Method and apparatus for configuring a processor embedded in an integrated circuit for use as a logic element Philip B. James-Roxby 2010-04-13
7689726 Bootable integrated circuit device for readback encoding of configuration data Prasanna Sundararajan, Brandon J. Blodget, Scott P. McMillan, Philip B. James-Roxby 2010-03-30
7653895 Memory arrangement for message processing by a plurality of threads Philip B. James-Roxby 2010-01-26
7574680 Method and apparatus for application-specific programmable memory architecture and interconnection network on a chip Chidamber R. Kulkarni, Gordon J. Brebner, Philip B. James-Roxby 2009-08-11
7552042 Method for message processing on a programmable logic device Gordon J. Brebner, Philip B. James-Roxby, Chidamber R. Kulkarni 2009-06-23
7386826 Using redundant routing to reduce susceptibility to single event upsets in PLD designs Prasanna Sundararajan 2008-06-10
7328335 Bootable programmable logic device for internal decoding of encoded configuration data Prasanna Sundararajan, Brandon J. Blodget, Scott P. McMillan, Philip B. James-Roxby 2008-02-05
7227378 Reconfiguration of a programmable logic device using internal control Brandon J. Blodget, Scott P. McMillan, Philip B. James-Roxby, Prasanna Sundararajan, Derek R. Curd +3 more 2007-06-05
7228520 Method and apparatus for a programmable interface of a soft platform on a programmable logic device Gordon J. Brebner, Philip B. James-Roxby, Chidamber R. Kulkarni 2007-06-05
7185309 Method and apparatus for application-specific programmable memory architecture and interconnection network on a chip Chidamber R. Kulkarni, Gordon J. Brebner, Philip B. James-Roxby 2007-02-27
7131077 Using an embedded processor to implement a finite state machine Philip B. James-Roxby 2006-10-31
7111215 Methods of reducing the susceptibility of PLD designs to single event upsets Prasanna Sundararajan, Stephen M. Trimberger 2006-09-19