Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12328396 | Method for cryptographic engine to interface with an arbitrary number of processor cards in a scalable environment | Matthew Parker, Adriane R. Van Auken, Mercer Peirce Richardson, Joseph Kaemmer, Neal J. Buchmeyer | 2025-06-10 |
| 7584448 | Constructing a model of a programmable logic device | Bart Reynolds, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston | 2009-09-01 |
| 7536668 | Determining networks of a tile module of a programmable logic device | Bart Reynolds, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston | 2009-05-19 |
| 7472370 | Comparing graphical and netlist connections of a programmable logic device | Bart Reynolds, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston | 2008-12-30 |
| 7451423 | Determining indices of configuration memory cell modules of a programmable logic device | Bart Reynolds, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston | 2008-11-11 |
| 7451420 | Determining reachable pins of a network of a programmable logic device | Bart Reynolds, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston | 2008-11-11 |
| 7451424 | Determining programmable connections through a switchbox of a programmable logic device | Bart Reynolds, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston | 2008-11-11 |
| 7451425 | Determining controlling pins for a tile module of a programmable logic device | Bart Reynolds, Daniel P. Kirkwood, James F. Barei, Benjamin D. Ralston | 2008-11-11 |
| 7107565 | PLD device representation with factored repeatable tiles | Jeffrey V. Lindholm | 2006-09-12 |