| 12293187 |
Efficient processing of nested loops for computing device with multiple configurable processing elements using multiple spoke counts |
Tony M. Brewer |
2025-05-06 |
| 12242884 |
Loop execution in a reconfigurable compute fabric |
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2025-03-04 |
| 12174759 |
Interpolation acceleration in a processor memory interface |
Bryan Hornung, Tony M. Brewer, Patrick Estep |
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| 12038868 |
Context load mechanism in a coarse-grained reconfigurable array processor |
Bryan Hornung, David Patrick |
2024-07-16 |
| 11907718 |
Loop execution in a reconfigurable compute fabric using flow controllers for respective synchronous flows |
Bryan Hornung, Patrick Estep |
2024-02-20 |
| 11861366 |
Efficient processing of nested loops for computing device with multiple configurable processing elements using multiple spoke counts |
Tony M. Brewer |
2024-01-02 |
| 11815935 |
Programming a coarse grained reconfigurable array through description of data flow graphs |
Skyler Arron Windh, Allan Porterfield, Randall Paul Meyer, Patrick Estep, Bashar Romanous |
2023-11-14 |
| 11802957 |
Increasing cache hits for synthetic aperture radar |
Patrick Estep, Tony M. Brewer, Bryan Hornung |
2023-10-31 |
| 11789642 |
Loading data from memory during dispatch |
Bryan Hornung, Tony M. Brewer |
2023-10-17 |
| 11709796 |
Data input/output operations during loop execution in a reconfigurable compute fabric |
Bryan Hornung |
2023-07-25 |
| 11675588 |
Tile-based result buffering in memory-compute systems |
Tony M. Brewer, Gongyu Wang |
2023-06-13 |
| 7342922 |
Multi-stage switching for networks |
— |
2008-03-11 |
