Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10901854 | Temporal logical transactions | Yao-Ching Chen, Xiaohong Fu, Claire McFeely, Maryela E. Weihrauch | 2021-01-26 |
| 10896096 | Temporal logical transactions | Yao-Ching Chen, Xiaohong Fu, Claire McFeely, Maryela E. Weihrauch | 2021-01-19 |
| 8378712 | Integrated circuit with crosslinked interconnect networks | Wen Zhou | 2013-02-19 |
| 7915917 | Integrated circuit with improved logic cells | Wen Zhou | 2011-03-29 |
| 7911228 | Integrated circuit with improved logic cells | Wen Zhou | 2011-03-22 |
| 7899797 | Package resolution mechanism for database systems | Curt L. Cotner, Tammie Dang, Brian K. Howell, Hui-An Lee, Charles H. Lin +4 more | 2011-03-01 |
| 7719311 | Integrated circuit with improved logic cells | Wen Zhou | 2010-05-18 |
| 7685214 | Order-preserving encoding formats of floating-point decimal numbers for efficient value comparison | Yao-Ching Chen, Michael F. Cowlishaw, Christopher Crone, Ronald M. Smith, Sr., Guogen Zhang +1 more | 2010-03-23 |
| 7412669 | Generation of graphical design representation from a design specification data file | Chukwuweta Chukwudebe | 2008-08-12 |
| 6467009 | Configurable processor system unit | Steven Winegarden, Bart Reynolds, Brian Fox, Jean-Didier Allegrucci, Sridhar Krishnamurthy +4 more | 2002-10-15 |
| 6459646 | Bank-based configuration and reconfiguration for programmable logic in a system on a chip | Wilson K. Yee, Edmond Y. Cheung | 2002-10-01 |
| 6367056 | Method for incremental timing analysis | — | 2002-04-02 |
| 6366121 | Programmable logic array integrated circuit architectures | Richard G. Cliff, Francis B. Heile, Joseph Huang, Christopher F. Lane, Cameron McClintock +7 more | 2002-04-02 |
| 6301694 | Hierarchical circuit partitioning using sliding windows | John Tse | 2001-10-09 |
| 6212668 | Gain matrix for hierarchical circuit partitioning | John Tse | 2001-04-03 |
| 6102964 | Fitting for incremental compilation of electronic designs | John Tse, David W. Mendel | 2000-08-15 |
| 5982195 | Programmable logic device architectures | Richard G. Cliff, Francis B. Heile, Joseph Huang, Cameron McClintock, David W. Mendel +5 more | 1999-11-09 |
| 5963049 | Programmable logic array integrated circuit architectures | Richard G. Cliff, Francis B. Heile, Joseph Huang, Christopher F. Lane, Cameron McClintock +7 more | 1999-10-05 |
| 5909126 | Programmable logic array integrated circuit devices with interleaved logic array blocks | Richard G. Cliff, Francis B. Heile, Joseph Huang, Christopher F. Lane, Cameron McClintock +7 more | 1999-06-01 |
| 5883850 | Programmable logic array integrated circuits | Richard G. Cliff, L. Todd Cope, Cameron McClintock, William Leong, James A. Watson +2 more | 1999-03-16 |
| 5880597 | Interleaved interconnect for programmable logic array devices | — | 1999-03-09 |
| 5844854 | Programmable logic device with two dimensional memory addressing | — | 1998-12-01 |
| 5672985 | Programmable logic array integrated circuits with carry and/or cascade rings | — | 1997-09-30 |
| 5631576 | Programmable logic array integrated circuit devices with flexible carry chains | John Tse | 1997-05-20 |