Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12248745 | Generating integrated circuit placements using neural networks | Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more | 2025-03-11 |
| 11853677 | Generating integrated circuit placements using neural networks | Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more | 2023-12-26 |
| 11556690 | Generating integrated circuit placements using neural networks | Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more | 2023-01-17 |
| 11216609 | Generating integrated circuit placements using neural networks | Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more | 2022-01-04 |
| 10318691 | Timing analysis and optimization of asynchronous circuit designs | Philippe Sarrazin | 2019-06-11 |
| 8893070 | Method for repeated block modification for chip routing | Jacob Avidan, Sandeep Grover, Philippe Sarrazin | 2014-11-18 |
| 8407650 | Method for repeated block modification for chip routing | Jacob Avidan, Sandeep Grover, Philippe Sarrazin | 2013-03-26 |
| 7971168 | Method for repeated block timing analysis | Robert Swanson, Jacob Avidan | 2011-06-28 |
| 5574634 | Regulator for pumped voltage generator | David B. Parlour | 1996-11-12 |
| 5561367 | Structure and method for testing wiring segments in an integrated circuit device | F. Erich Goettling, Vincent L. Tong | 1996-10-01 |
| 5319252 | Load programmable output buffer | Kerry M. Pierce | 1994-06-07 |
| 5166858 | Capacitor formed in three conductive layers | Scott O. Frake | 1992-11-24 |