Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
RC

Roger David Carpenter — 13 Patents

Google: 5 patents #5,270 of 22,993Top 25%
AMD: 4 patents #3,118 of 9,280Top 35%
SYSynopsis: 1 patents #1 of 39Top 3%
SYSynopsys: 1 patents #1,143 of 2,302Top 50%
WCWave Computing: 1 patents #7 of 18Top 40%
San Francisco, CA: #3,398 of 26,999 inventorsTop 15%
California: #47,433 of 386,348 inventorsTop 15%
Overall (All Time): #362,438 of 4,157,543Top 9%
13 Patents All Time
Roger David Carpenter has been granted 13 US patents while listed as an inventor at AMD. The first was granted in 1992 and the most recent in December 2025. Roger David Carpenter ranks #362,438 of 4,157,543 US inventors in our database (top 8.7%). Patent records list Roger David Carpenter in San Francisco, CA, US.

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12488164 Alignment cost for integrated circuit placement Ebrahim Songhori, Shiyue Wang, Azalia Mirhoseini, Anna Darling Goldie, Wei Jiang +2 more 2025-12-02
12248745 Generating integrated circuit placements using neural networks Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more 2025-03-11
11853677 Generating integrated circuit placements using neural networks Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more 2023-12-26 $69,607,000
11556690 Generating integrated circuit placements using neural networks Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more 2023-01-17 $46,717,000
11216609 Generating integrated circuit placements using neural networks Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more 2022-01-04 $94,516,000
10318691 Timing analysis and optimization of asynchronous circuit designs Philippe Sarrazin 2019-06-11
8893070 Method for repeated block modification for chip routing Jacob Avidan, Sandeep Grover, Philippe Sarrazin 2014-11-18 $5,069,000
8407650 Method for repeated block modification for chip routing Jacob Avidan, Sandeep Grover, Philippe Sarrazin 2013-03-26 $3,032,000
7971168 Method for repeated block timing analysis Robert Swanson, Jacob Avidan 2011-06-28
5574634 Regulator for pumped voltage generator David B. Parlour 1996-11-12 $24,566,000
5561367 Structure and method for testing wiring segments in an integrated circuit device F. Erich Goettling, Vincent L. Tong 1996-10-01 $14,129,000
5319252 Load programmable output buffer Kerry M. Pierce 1994-06-07 $5,455,000
5166858 Capacitor formed in three conductive layers Scott O. Frake 1992-11-24 $6,625,000