| 9509307 |
Interconnect multiplexers and methods of reducing contention currents in an interconnect multiplexer |
Anil Kumar Kandala, Santosh Yachareni, Shidong Zhou, Robert Fu, Philip D. Costello +3 more |
2016-11-29 |
$19,852,000 |
| 9166584 |
Current-encoded signaling |
Anil Kumar Kandala, Srinivasa L. Karumajji |
2015-10-20 |
$19,138,000 |
| 8330501 |
Dual mode rail-to-rail buffer for low voltage memory |
Gautham S. Jami |
2012-12-11 |
$2,673,000 |
| 8004308 |
Techniques for providing calibrated on-chip termination impedance |
Hyun Yi |
2011-08-23 |
$8,869,000 |
| 7999568 |
Techniques for serially transmitting on-chip termination control signals |
Hyun Yi, Quyen Doan |
2011-08-16 |
$9,115,000 |
| 7884638 |
Techniques for providing calibrated on-chip termination impedance |
Hyun Yi |
2011-02-08 |
$12,463,000 |
| 7855574 |
Programmable multiple supply regions with switched pass gate level converters |
Ravi Thiruveedhula, Hyun Yi |
2010-12-21 |
$15,245,000 |
| 7719309 |
Techniques for providing calibrated on-chip termination impedance |
Hyun Yi |
2010-05-18 |
$10,290,000 |
| 7671626 |
Versatile logic element and logic array block |
David Lewis, Paul Leventis, Andy L. Lee, Henry Kim, Bruce B. Pedersen +4 more |
2010-03-02 |
$11,135,000 |
| 7639042 |
Methods of reducing power in programmable logic devices using low voltage swing for routing signals |
Christopher F. Lane |
2009-12-29 |
$3,134,000 |
| 7518399 |
Method of reducing leakage current using sleep transistors in programmable logic device |
Hyun Yi, Christopher F. Lane |
2009-04-14 |
$47,525,000 |
| 7443193 |
Techniques for providing calibrated parallel on-chip termination impedance |
Hyun Yi |
2008-10-28 |
$8,772,000 |
| 7432734 |
Versatile logic element and logic array block |
David Lewis, Paul Leventis, Andy L. Lee, Henry Kim, Bruce B. Pedersen +4 more |
2008-10-07 |
$15,604,000 |
| 7423450 |
Techniques for providing calibrated on-chip termination impedance |
Hyun Yi |
2008-09-09 |
$7,330,000 |
| 7410293 |
Techniques for sensing temperature and automatic calibration on integrated circuits |
Quyen Doan |
2008-08-12 |
$7,490,000 |
| 7391229 |
Techniques for serially transmitting on-chip termination control signals |
Hyun Yi, Quyen Doan |
2008-06-24 |
$10,101,000 |
| 7355440 |
Method of reducing leakage current using sleep transistors in programmable logic device |
Hyun Yi, Christopher F. Lane |
2008-04-08 |
$4,082,000 |
| 7262634 |
Methods of reducing power in programmable logic devices using low voltage swing for routing signals |
Christopher F. Lane |
2007-08-28 |
$7,511,000 |
| 7218133 |
Versatile logic element and logic array block |
David Lewis, Paul Leventis, Andy L. Lee, Henry Kim, Bruce B. Pedersen +4 more |
2007-05-15 |
$8,796,000 |
| 7161381 |
Multiple size memories in a programmable logic device |
Srinivas T. Reddy, David Jefferson, Christopher F. Lane, Richard G. Cliff |
2007-01-09 |
$9,027,000 |
| 6965249 |
Programmable logic device with redundant circuitry |
Christopher F. Lane, Ketan Zaveri, Hyun Yi, Giles V. Powell, Paul Leventis +7 more |
2005-11-15 |
$20,071,000 |
| 6937064 |
Versatile logic element and logic array block |
David Lewis, Paul Leventis, Andy L. Lee, Henry Kim, Bruce B. Pedersen +4 more |
2005-08-30 |
$13,804,000 |
| 6720796 |
Multiple size memories in a programmable logic device |
Srinivas T. Reddy, David Jefferson, Christopher F. Lane, Richard G. Cliff |
2004-04-13 |
$71,135,000 |
| 6298007 |
Method and apparatus for eliminating false data in a page mode memory device |
Yasushi Kasa |
2001-10-02 |
$2,425,000 |
| 6201747 |
Method and apparatus for measuring subthreshold current in a memory array |
Bhimachar Venkatesh |
2001-03-13 |
$6,055,000 |
