Issued Patents All Time
Showing 25 most recent of 102 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12195380 | Preform assembly for drawing multicore or holey optical fibre and method of manufacturing thereof | Anand Pandey, Ranjith Balakrishnan, Apeksha Malviya | 2025-01-14 |
| 11561341 | Cutoff shifted optical fibre | Apeksha Malaviya, MalleshwaraRao Lanke, Anand Pandey | 2023-01-24 |
| 11327222 | Cut-off shifted optical fibre with large effective area | Anand Pandey, Apeksha Malaviya, Malleswara Rao Lanke | 2022-05-10 |
| 10977404 | Dynamic scan chain and method | Dinesh D. Gaitonde, Ritesh Mani | 2021-04-13 |
| 9208357 | FPGA configuration bitstream protection using multiple keys | Martin Langhammer, Juju Joyce, Keone Streicher, David Jefferson, Nitin Prasad | 2015-12-08 |
| 9094014 | PLD architecture for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Christopher F. Lane +3 more | 2015-07-28 |
| 8826038 | FPGA configuration bitstream protection using multiple keys | Martin Langhammer, Juju Joyce, Keone Streicher, David Jefferson, Nitin Prasad | 2014-09-02 |
| 8732646 | PLD architecture for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Christopher F. Lane +3 more | 2014-05-20 |
| 8407649 | PLD architecture for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Christopher F. Lane +3 more | 2013-03-26 |
| 8209545 | FPGA configuration bitstream protection using multiple keys | Martin Langhammer, Juju Joyce, Keone Streicher, David Jefferson, Nitin Prasad | 2012-06-26 |
| 8198914 | Apparatus and methods for adjusting performance of programmable logic devices | Andy L. Lee, Christopher F. Lane, Ketan Zaveri, Richard G. Cliff, Cameron McClintock +1 more | 2012-06-12 |
| 8201129 | PLD architecture for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Chris Lane +3 more | 2012-06-12 |
| 7936184 | Apparatus and methods for adjusting performance of programmable logic devices | Andy L. Lee, Christopher F. Lane, Ketan Zaveri, Richard G. Cliff, Cameron McClintock +1 more | 2011-05-03 |
| 7725738 | FPGA configuration bitstream protection using multiple keys | Martin Langhammer, Juju Joyce, Keone Streicher, David Jefferson, Nitin Prasad | 2010-05-25 |
| 7620876 | Reducing false positives in configuration error detection for programmable devices | David Lewis, Robert Blake, Richard G. Cliff | 2009-11-17 |
| 7584447 | PLD architecture for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Chris Lane +3 more | 2009-09-01 |
| 7253660 | Multiplexing device including a hardwired multiplexer in a programmable logic device | Paul Leventis, Bruce B. Pedersen, Chris Lane, David Lewis | 2007-08-07 |
| 7236008 | Multiple size memories in a programmable logic device | Richard G. Cliff, Andy L. Lee, David Lewis | 2007-06-26 |
| 7228451 | Programmable clock network for distributing clock signals to and between first and second sections of an integrated circuit | Triet Nguyen, David Jefferson, Keone Streicher | 2007-06-05 |
| 7161381 | Multiple size memories in a programmable logic device | David Jefferson, Christopher F. Lane, Vikram Santurkar, Richard G. Cliff | 2007-01-09 |
| 7058920 | Methods for designing PLD architectures for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Chris Lane +3 more | 2006-06-06 |
| 7051153 | Memory array operating as a shift register | Yi-Wen Lin, Changsong Zhang, David Jefferson | 2006-05-23 |
| 6996736 | Programmable clock network for distributing clock signals to and between first and second sections of an integrated circuit | Triet Nguyen, David Jefferson, Keone Streicher | 2006-02-07 |
| 6970014 | Routing architecture for a programmable logic device | David Lewis, Paul Leventis, Andy L. Lee, Brian Johnson, Richard G. Cliff +5 more | 2005-11-29 |
| 6897678 | Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits | Ketan Zaveri, Christopher F. Lane, Andy L. Lee, Cameron McClintock, Bruce B. Pedersen | 2005-05-24 |