Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
SR

Srinivas T. Reddy — 102 Patents

Intel: 97 patents #221 of 30,777Top 1%
SLSterlite Technologies Limited: 2 patents #20 of 84Top 25%
AMD: 1 patents #7,912 of 9,280Top 90%
Overall (All Time): #13,957 of 4,157,543Top 1%
102 Patents All Time
Srinivas T. Reddy has been granted 102 US patents while listed as an inventor at Intel. The first was granted in 1994 and the most recent in January 2025. Srinivas T. Reddy ranks #13,957 of 4,157,543 US inventors in our database (top 0.34%). Patent records list Srinivas T. Reddy in Bhangrola, CA, IN.

Patents per Year

Patents granted per year, 1994 to 2025Bar chart with a peak of 15 patents in 2002.peak 151994: 1 patents19941995: 3 patents1996: 3 patents1997: 3 patents19971998: 7 patents1999: 9 patents2000: 11 patents20002001: 14 patents2002: 15 patents2003: 4 patents20032004: 4 patents2005: 5 patents2006: 3 patents20062007: 4 patents2009: 2 patents2010: 1 patents20102011: 1 patents2012: 3 patents2013: 1 patents20132014: 2 patents2015: 2 patents2021: 1 patents20212022: 1 patents2023: 1 patents2025: 1 patents2025

Issued Patents All Time

Showing 1–25 of 102 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12195380 Preform assembly for drawing multicore or holey optical fibre and method of manufacturing thereof Anand Pandey, Ranjith Balakrishnan, Apeksha Malviya 2025-01-14
11561341 Cutoff shifted optical fibre Apeksha Malaviya, MalleshwaraRao Lanke, Anand Pandey 2023-01-24
11327222 Cut-off shifted optical fibre with large effective area Anand Pandey, Apeksha Malaviya, Malleswara Rao Lanke 2022-05-10
10977404 Dynamic scan chain and method Dinesh D. Gaitonde, Ritesh Mani 2021-04-13 $39,336,000
9208357 FPGA configuration bitstream protection using multiple keys Martin Langhammer, Juju Joyce, Keone Streicher, David Jefferson, Nitin Prasad 2015-12-08 $34,853,000
9094014 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Christopher F. Lane +3 more 2015-07-28 $63,457,000
8826038 FPGA configuration bitstream protection using multiple keys Martin Langhammer, Juju Joyce, Keone Streicher, David Jefferson, Nitin Prasad 2014-09-02 $10,652,000
8732646 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Christopher F. Lane +3 more 2014-05-20 $5,624,000
8407649 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Christopher F. Lane +3 more 2013-03-26 $9,920,000
8209545 FPGA configuration bitstream protection using multiple keys Martin Langhammer, Juju Joyce, Keone Streicher, David Jefferson, Nitin Prasad 2012-06-26 $18,229,000
8198914 Apparatus and methods for adjusting performance of programmable logic devices Andy L. Lee, Christopher F. Lane, Ketan Zaveri, Richard G. Cliff, Cameron McClintock +1 more 2012-06-12 $10,213,000
8201129 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Chris Lane +3 more 2012-06-12 $10,213,000
7936184 Apparatus and methods for adjusting performance of programmable logic devices Andy L. Lee, Christopher F. Lane, Ketan Zaveri, Richard G. Cliff, Cameron McClintock +1 more 2011-05-03 $24,896,000
7725738 FPGA configuration bitstream protection using multiple keys Martin Langhammer, Juju Joyce, Keone Streicher, David Jefferson, Nitin Prasad 2010-05-25 $3,835,000
7620876 Reducing false positives in configuration error detection for programmable devices David Lewis, Robert Blake, Richard G. Cliff 2009-11-17 $8,464,000
7584447 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Chris Lane +3 more 2009-09-01 $10,001,000
7253660 Multiplexing device including a hardwired multiplexer in a programmable logic device Paul Leventis, Bruce B. Pedersen, Chris Lane, David Lewis 2007-08-07 $8,912,000
7236008 Multiple size memories in a programmable logic device Richard G. Cliff, Andy L. Lee, David Lewis 2007-06-26 $4,237,000
7228451 Programmable clock network for distributing clock signals to and between first and second sections of an integrated circuit Triet Nguyen, David Jefferson, Keone Streicher 2007-06-05 $8,821,000
7161381 Multiple size memories in a programmable logic device David Jefferson, Christopher F. Lane, Vikram Santurkar, Richard G. Cliff 2007-01-09 $9,027,000
7058920 Methods for designing PLD architectures for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Chris Lane +3 more 2006-06-06 $6,944,000
7051153 Memory array operating as a shift register Yi-Wen Lin, Changsong Zhang, David Jefferson 2006-05-23 $21,766,000
6996736 Programmable clock network for distributing clock signals to and between first and second sections of an integrated circuit Triet Nguyen, David Jefferson, Keone Streicher 2006-02-07 $24,355,000
6970014 Routing architecture for a programmable logic device David Lewis, Paul Leventis, Andy L. Lee, Brian Johnson, Richard G. Cliff +5 more 2005-11-29 $7,491,000
6897678 Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits Ketan Zaveri, Christopher F. Lane, Andy L. Lee, Cameron McClintock, Bruce B. Pedersen 2005-05-24 $21,058,000