Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Paul Leventis — 48 Patents

Intel: 39 patents #900 of 30,777Top 3%
Google: 9 patents #2,895 of 22,993Top 15%
Mountain View, CA: #271 of 11,022 inventorsTop 3%
California: #8,595 of 386,348 inventorsTop 3%
Overall (All Time): #57,596 of 4,157,543Top 2%
48 Patents All Time
Paul Leventis has been granted 48 US patents while listed as an inventor at Intel. The first was granted in 2003 and the most recent in February 2025. Paul Leventis ranks #57,596 of 4,157,543 US inventors in our database (top 1.4%). Patent records list Paul Leventis in Mountain View, CA, US.

Issued Patents All Time

Showing 1–25 of 48 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12226690 Resolution-based scaling of real-time interactive graphics Dov Zimring, Benjamin Frenkel, Matthew Rodgers, Clinton Smullen, Robert McCool 2025-02-18
11813521 Memory management in gaming rendering Paul Lalonde, Jean-Francois Roy 2023-11-14 $88,633,000
11701587 Methods and systems for rendering and encoding content for online interactive gaming sessions Clinton Smullen, Dov Zimring, Jani Huoponen, Aki Kuusela, Jean-Francois Roy +1 more 2023-07-18 $89,364,000
11684849 Distributed sample-based game profiling with game metadata and metrics and gaming API platform supporting third-party content Jack Buser, Gregory Joseph Canessa, Garret Kelly 2023-06-27 $76,505,000
11662051 Shadow tracking of real-time interactive simulations for complex system analysis Dov Zimring 2023-05-30 $97,352,000
11654354 Resolution-based scaling of real-time interactive graphics Dov Zimring, Benjamin Frenkel, Matthew Rodgers, Clinton Smullen, Robert McCool 2023-05-23 $116,329,000
11369873 Methods and systems for rendering and encoding content for online interactive gaming sessions Clinton Smullen, Dov Zimring, Jani Huoponen, Aki Kuusela, Jean-Francois Roy +1 more 2022-06-28 $74,298,000
11110348 Memory management in gaming rendering Paul Lalonde, Jean-Francois Roy 2021-09-07 $107,522,000
11077364 Resolution-based scaling of real-time interactive graphics Dov Zimring, Benjamin Frenkel, Matthew Rodgers, Clinton Smullen, Robert McCool 2021-08-03 $104,518,000
9576095 Partial reconfiguration compatibility detection in an integrated circuit device Yin Chong Hew 2017-02-21
9489480 Techniques for compiling and generating a performance analysis for an integrated circuit design Gordon Raymond Chiu, Benjamin Gamsa 2016-11-08
9094014 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +3 more 2015-07-28 $63,457,000
8732646 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +3 more 2014-05-20 $5,624,000
8694946 Simultaneous switching noise optimization Joshua David Fender, Navid Azizi 2014-04-08 $7,011,000
8443321 Pessimism removal in the modeling of simultaneous switching noise Joshua David Fender, Kamal Patel, Navid Azizi 2013-05-14 $10,515,000
8407649 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +3 more 2013-03-26 $9,920,000
8201129 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +3 more 2012-06-12 $10,213,000
8191025 Redundancy structures and methods in a programmable logic device Michael Chan, David Lewis, Ketan Zaveri, Hyun Yi, Chris Lane 2012-05-29 $5,786,000
8103975 Apparatus and methods for optimizing the performance of programmable logic devices using multiple supply voltage David Lewis, Vaughn Betz, Christopher F. Lane, Andy L. Lee, Jeffrey T. Watt +1 more 2012-01-24 $32,635,000
8099692 Power-driven timing analysis and placement for programmable logic Yaron Kretchmer, Vaughn Betz 2012-01-17 $10,977,000
7983880 Simultaneous switching noise analysis using superposition techniques Joshua David Fender 2011-07-19 $8,014,000
7861190 Power-driven timing analysis and placement for programmable logic Yaron Kretchmer, Vaughn Betz 2010-12-28 $6,167,000
7671626 Versatile logic element and logic array block David Lewis, Andy L. Lee, Henry Kim, Bruce B. Pedersen, Chris Wysocki +4 more 2010-03-02 $11,135,000
7656191 Distributed memory in field-programmable gate array integrated circuit devices David Lewis, Vaughn Betz, Thomas Yau-Tsun Wong, Andy L. Lee, Philip Pan 2010-02-02 $7,193,000
7644386 Redundancy structures and methods in a programmable logic device Michael Chan, David Lewis, Ketan Zaveri, Hyun Yi, Chris Lane 2010-01-05 $7,336,000