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Dynamic multicycles for core-periphery timing closure |
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2019-06-11 |
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Low frequency variation calibration circuitry |
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2019-03-05 |
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Supporting pseudo open drain input/output standards in a programmable logic device |
Gordon Raymond Chiu, Michael Howard Kipper |
2018-04-17 |
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Supporting pseudo open drain input/output standards in a programmable logic device |
Gordon Raymond Chiu, Michael Howard Kipper |
2017-07-04 |
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Method and apparatus for performing timing analysis on calibrated paths |
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2017-06-20 |
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Circuits and methods for DQS autogating |
Krzysztof Maryan, Gordon Raymond Chiu, Warren Nordyke |
2017-06-13 |
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Circuits and methods for DQS autogating |
Krzysztof Maryan, Gordon Raymond Chiu, Warren Nordyke |
2016-02-09 |
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Method and system for reducing the effect of component aging |
Gordon Raymond Chiu |
2015-06-16 |
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Method and system for reducing the effect of component recovery |
Gordon Raymond Chiu |
2015-06-02 |
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Timing analysis with end-of-life pessimism removal |
Gordon Raymond Chiu, Ian Kuon, John Curtis Van Dyken |
2015-03-10 |
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Memory interface circuitry with data strobe signal sharing capabilities |
Gordon Raymond Chiu |
2014-11-25 |
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Simultaneous switching noise optimization |
Joshua David Fender, Paul Leventis |
2014-04-08 |
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Method and apparatus for simultaneous switching noise optimization |
Michael Howard Kipper, Joshua David Fender, David Samuel Goldman |
2014-01-07 |
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Methods for calibrating memory interface circuitry |
Valavan Manohararajah, Ivan Blunno, Ryan Fung |
2013-10-22 |
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Pessimism removal in the modeling of simultaneous switching noise |
Joshua David Fender, Kamal Patel, Paul Leventis |
2013-05-14 |
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Reducing simultaneous switching noise in an integrated circuit design during placement |
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2012-10-30 |
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Method and apparatus for simultaneous switching noise optimization |
Michael Howard Kipper, Joshua David Fender, David Samuel Goldman |
2012-10-23 |
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Circuit design with incremental simultaneous switching noise analysis |
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2012-04-03 |
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Low leakage asymmetric SRAM cell devices |
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2007-12-11 |