Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10320393 | Dynamic multicycles for core-periphery timing closure | Aditi Kumaraswamy, Emily Alexandra Ng | 2019-06-11 |
| 10224908 | Low frequency variation calibration circuitry | Joshua David Fender, Gordon Raymond Chiu | 2019-03-05 |
| 9948307 | Supporting pseudo open drain input/output standards in a programmable logic device | Gordon Raymond Chiu, Michael Howard Kipper | 2018-04-17 |
| 9698795 | Supporting pseudo open drain input/output standards in a programmable logic device | Gordon Raymond Chiu, Michael Howard Kipper | 2017-07-04 |
| 9684742 | Method and apparatus for performing timing analysis on calibrated paths | Joshua David Fender, Ryan Fung | 2017-06-20 |
| 9679633 | Circuits and methods for DQS autogating | Krzysztof Maryan, Gordon Raymond Chiu, Warren Nordyke | 2017-06-13 |
| 9257164 | Circuits and methods for DQS autogating | Krzysztof Maryan, Gordon Raymond Chiu, Warren Nordyke | 2016-02-09 |
| 9058436 | Method and system for reducing the effect of component aging | Gordon Raymond Chiu | 2015-06-16 |
| 9047215 | Method and system for reducing the effect of component recovery | Gordon Raymond Chiu | 2015-06-02 |
| 8977998 | Timing analysis with end-of-life pessimism removal | Gordon Raymond Chiu, Ian Kuon, John Curtis Van Dyken | 2015-03-10 |
| 8897083 | Memory interface circuitry with data strobe signal sharing capabilities | Gordon Raymond Chiu | 2014-11-25 |
| 8694946 | Simultaneous switching noise optimization | Joshua David Fender, Paul Leventis | 2014-04-08 |
| 8627254 | Method and apparatus for simultaneous switching noise optimization | Michael Howard Kipper, Joshua David Fender, David Samuel Goldman | 2014-01-07 |
| 8565033 | Methods for calibrating memory interface circuitry | Valavan Manohararajah, Ivan Blunno, Ryan Fung | 2013-10-22 |
| 8443321 | Pessimism removal in the modeling of simultaneous switching noise | Joshua David Fender, Kamal Patel, Paul Leventis | 2013-05-14 |
| 8302058 | Reducing simultaneous switching noise in an integrated circuit design during placement | Michael Howard Kipper, Joshua David Fender | 2012-10-30 |
| 8296704 | Method and apparatus for simultaneous switching noise optimization | Michael Howard Kipper, Joshua David Fender, David Samuel Goldman | 2012-10-23 |
| 8151233 | Circuit design with incremental simultaneous switching noise analysis | Joshua David Fender | 2012-04-03 |
| 7307905 | Low leakage asymmetric SRAM cell devices | Farid Najm, Andreas Moshovos | 2007-12-11 |