Issued Patents All Time
Showing 25 most recent of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10963777 | Method and apparatus for implementing layers on a convolutional neural network accelerator | Utku Aydonat, Andrew Chaang Ling | 2021-03-30 |
| 10909296 | Method and apparatus for relocating design modules while preserving timing closure | Mark Stephen Wheeler | 2021-02-02 |
| 10726328 | Method and apparatus for designing and implementing a convolution neural net accelerator | Andrew Chaang Ling, Utku Aydonat | 2020-07-28 |
| 10671781 | Method and apparatus for performing register retiming in the presence of false path timing analysis exceptions | Salem Derisavi, Benjamin Gamsa, David Milton | 2020-06-02 |
| 10614354 | Method and apparatus for implementing layers on a convolutional neural network accelerator | Utku Aydonat, Andrew Chaang Ling | 2020-04-07 |
| 10394997 | Method and apparatus for relocating design modules while preserving timing closure | Mark Stephen Wheeler | 2019-08-27 |
| 10387603 | Incremental register retiming of an integrated circuit design | Nishanth Sinnadurai | 2019-08-20 |
| 10339238 | Method and apparatus for performing register retiming in the presence of timing analysis exceptions | Salem Derisavi, Benjamin Gamsa | 2019-07-02 |
| 10339244 | Method and apparatus for implementing user-guided speculative register retiming in a compilation flow | Benjamin Gamsa | 2019-07-02 |
| 10224908 | Low frequency variation calibration circuitry | Joshua David Fender, Navid Azizi | 2019-03-05 |
| 10157250 | Speculative circuit design component graphical user interface | Benjamin Gamsa | 2018-12-18 |
| 10152565 | Methods for performing register retiming operations into synchronization regions interposed between circuits associated with different clock domains | Benjamin Gamsa | 2018-12-11 |
| 10102326 | Method and apparatus for relocating design modules while preserving timing closure | Mark Stephen Wheeler | 2018-10-16 |
| 10083007 | Fast filtering | Utku Aydonat, Andrew Chaang Ling, Shane O'Connell | 2018-09-25 |
| 9996652 | Incremental register retiming of an integrated circuit design | Nishanth Sinnadurai | 2018-06-12 |
| 9971858 | Method and apparatus for performing register retiming in the presence of false path timing analysis exceptions | Salem Derisavi, Benjamin Gamsa, David Milton | 2018-05-15 |
| 9948307 | Supporting pseudo open drain input/output standards in a programmable logic device | Navid Azizi, Michael Howard Kipper | 2018-04-17 |
| 9891904 | Method and apparatus for optimizing implementation of a soft processor executing a fixed program on a target device | Jason Wong, Deshanand Singh, Valavan Manohararajah | 2018-02-13 |
| 9852255 | Method and apparatus for implementing periphery devices on a programmable circuit using partial reconfiguration | Kalen B. Brunham, Joshua David Fender | 2017-12-26 |
| 9733855 | System and methods for adjusting memory command placement | Yu Ying Ong, Muhamad Aidil Jazmi, Teik Ming Goh | 2017-08-15 |
| 9710591 | Method and apparatus for performing register retiming in the presence of timing analysis exceptions | Salem Derisavi, Benjamin Gamsa | 2017-07-18 |
| 9698795 | Supporting pseudo open drain input/output standards in a programmable logic device | Navid Azizi, Michael Howard Kipper | 2017-07-04 |
| 9679633 | Circuits and methods for DQS autogating | Krzysztof Maryan, Warren Nordyke, Navid Azizi | 2017-06-13 |
| 9589090 | Method and apparatus for performing multiple stage physical synthesis | Deshanand Singh, Valavan Manohararajah, Ivan Blunno, Stephen D. Brown | 2017-03-07 |
| 9552456 | Methods and apparatus for probing signals from a circuit after register retiming | — | 2017-01-24 |