Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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David Samuel Goldman — 16 Patents

Intel: 14 patents #2,935 of 30,777Top 10%
Bala-Cynwyd, PA: #6 of 34 inventorsTop 20%
Pennsylvania: #4,567 of 74,527 inventorsTop 7%
Overall (All Time): #284,196 of 4,157,543Top 7%
16 Patents All Time
David Samuel Goldman has been granted 16 US patents while listed as an inventor at Intel. The first was granted in 1992 and the most recent in April 2025. David Samuel Goldman ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list David Samuel Goldman in Bala-Cynwyd, PA, US.

Patents per Year

Patents granted per year, 1992 to 2025Bar chart with a peak of 4 patents in 2014.peak 41992: 1 patents19921995: 1 patents2012: 1 patents20122013: 2 patents2014: 4 patents20142015: 2 patents2016: 1 patents20162019: 1 patents2022: 1 patents20222023: 1 patents2025: 1 patents2025

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12265772 Integrated circuit with peek and poke protection circuitry for multi-tenant usage model Scott J. Weber, Sean R. Atsatt 2025-04-01
11562101 On-device bitstream validation Scott J. Weber, Sean R. Atsatt, Andrew Draper 2023-01-24 $19,543,000
11379645 Integrated circuit with peek and poke protection circuitry for a multi-tenant usage model Scott J. Weber, Sean R. Atsatt 2022-07-05 $18,093,000
10242146 Method and apparatus for placing and routing partial reconfiguration modules Mark Bourgeault, Vaughn Betz, Alan L. Herrmann 2019-03-26
9361421 Method and apparatus for placing and routing partial reconfiguration modules Mark Bourgeault, Vaughn Betz, Alan L. Herrmann 2016-06-07
9111060 Partitioning designs to facilitate certification Adam Titley 2015-08-18 $14,677,000
9032343 Integrating multiple FPGA designs by merging configuration settings 2015-05-12 $15,740,000
8813013 Partitioning designs to facilitate certification Adam Titley 2014-08-19 $4,747,000
8671377 Method and apparatus for placement and routing of partial reconfiguration modules Mark Bourgeault, Vaughn Betz, Alan L. Herrmann 2014-03-11 $8,295,000
8635571 Integrating multiple FPGA designs by merging configuration settings 2014-01-21 $19,117,000
8627254 Method and apparatus for simultaneous switching noise optimization Michael Howard Kipper, Joshua David Fender, Navid Azizi 2014-01-07 $7,384,000
8434044 Specifying placement and routing constraints for security and redundancy Bruce B. Pedersen, Gabriel Quan, Yuen Ho Choi 2013-04-30 $7,888,000
8356358 Preventing information leakage between components on a programmable chip in the presence of faults Mark Bourgeault 2013-01-15 $18,543,000
8296704 Method and apparatus for simultaneous switching noise optimization Michael Howard Kipper, Joshua David Fender, Navid Azizi 2012-10-23 $5,405,000
5398529 Tamper-resistant lock Craig L. Krigsman 1995-03-21
5101646 Tamper-resistant lock Craig L. Krigsman 1992-04-07