Mark Bourgeault — 26 Patents at Intel

Mark Bourgeault has been granted 26 US patents while listed as an inventor at Intel. The first was granted in 2005 and the most recent in August 2025. Mark Bourgeault ranks #150,017 of 4,157,543 US inventors in our database (top 3.6%). Patent records list Mark Bourgeault in Stratham, NH, US.

Issued Patents All Time

Showing 1–25 of 26 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12383330	Reusable minimally invasive surgical instrument	Shekhar D. Nimkar, Brian Foster, Christopher Alesi, Charity Nguyen, Russ LaRoche +1 more	2025-08-12
11813017	Reusable minimally invasive surgical instrument	Shekhar D. Nimkar, Brian Foster, Christopher Alesi, Charity Nguyen, Russ LaRoche +1 more	2023-11-14
11507722	Method and apparatus for performing incremental compilation using structural netlist comparison	Kevin Chan	2022-11-22
11507723	Method and apparatus for performing incremental compilation using structural netlist comparison	Kevin Chan	2022-11-22
11480993	Methods for optimizing circuit performance via configurable clock skews	—	2022-10-25
11381243	Integrated circuit applications using partial reconfiguration	Joshua Walstrom	2022-07-05
10969820	Methods for optimizing circuit performance via configurable clock skews	—	2021-04-06
10374609	Integrated circuit applications using partial reconfiguration	Joshua Walstrom	2019-08-06
10275557	Method and apparatus for performing incremental compilation using structural netlist comparison	Kevin Chan	2019-04-30
10242146	Method and apparatus for placing and routing partial reconfiguration modules	David Samuel Goldman, Vaughn Betz, Alan L. Herrmann	2019-03-26
10175734	Techniques for adjusting latency of a clock signal to affect supply voltage	Gurvinder Tiwana	2019-01-08
10037048	Methods for optimizing circuit performance via configurable clock skews	—	2018-07-31
9602106	Methods for optimizing circuit performance via configurable clock skews	—	2017-03-21
9584129	Integrated circuit applications using partial reconfiguration	Joshua Walstrom	2017-02-28
9361421	Method and apparatus for placing and routing partial reconfiguration modules	David Samuel Goldman, Vaughn Betz, Alan L. Herrmann	2016-06-07
9183336	Automatic asynchronous signal pipelining	Ryan Fung, David Lewis	2015-11-10	$46,583,000
8832627	Automatic asynchronous signal pipelining	Ryan Fung, David Lewis	2014-09-09	$7,341,000
8671377	Method and apparatus for placement and routing of partial reconfiguration modules	David Samuel Goldman, Vaughn Betz, Alan L. Herrmann	2014-03-11	$8,295,000
8539414	Automatic asynchronous signal pipelining	Ryan Fung, David Lewis	2013-09-17	$6,493,000
8504970	Method and apparatus for performing automated timing closure analysis for systems implemented on target devices	Shawn Malhotra, Mark Ari Teper, Steven Caranci, Ketan Padalia	2013-08-06	$5,404,000
8356358	Preventing information leakage between components on a programmable chip in the presence of faults	David Samuel Goldman	2013-01-15	$18,543,000
8191028	Methods and systems for improving a maximum operating frequency of an integrated circuit during a route phase	Vaughn Betz	2012-05-29	$5,786,000
7676768	Automatic asynchronous signal pipelining	Ryan Fung, David Lewis	2010-03-09	$4,521,000
7415692	Method for programming programmable logic device with blocks that perform multiplication and other arithmetic functions	Jennifer Farrugia, Elias Ahmed	2008-08-19	$6,728,000
7412680	Method and apparatus for performing integrated global routing and buffer insertion	Vadim Gouterman, Vaughn Betz	2008-08-12	$7,490,000

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Mark Bourgeault — 26 Patents

Issued Patents All Time

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